PIC16LC72A-04I/SO Microchip Technology, PIC16LC72A-04I/SO Datasheet - Page 29

• Manufacturer Part Number: PIC16LC72A-04I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16LC72A-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.2
A crystal oscillator circuit is built-in between pins T1OSI
(input) and T1OSO (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). When the
Timer1 oscillator is enabled, RC0 and RC1 pins
become T1OSO and T1OSI inputs, overriding
TRISC<1:0>.
The oscillator is a low power oscillator rated up to 200
kHz. It will continue to run during SLEEP. It is primarily
intended for a 32 kHz crystal. Table 5-1 shows the
capacitor selection for the Timer1 oscillator.
The Timer1 oscillator is identical to the LP oscillator.
The user must provide a software time delay to ensure
proper oscillator start-up.
TABLE 5-1
TABLE 5-2
Crystals Tested:
32.768 kHz
100 kHz
200 kHz
Note 1: Higher capacitance increases the stability
Address Name
0Bh,8Bh
0Ch
8Ch
0Eh
0Fh
10h
Legend:
Osc Type
1999 Microchip Technology Inc.
LP
These values are for design guidance only.
2: Since each resonator/crystal has its own
Timer1 Oscillator
of oscillator but also increases the start-up
time.
characteristics, the user should consult the
resonator/crystal manufacturer for appropri-
ate values of external components.
x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by the Timer1 module.
PIR1
PIE1
TMR1H
T1CON
INTCON
TMR1L
Epson C-001R32.768K-A
Epson C-2 100.00 KC-P
STD XTL 200.000 kHz
100 kHz
200 kHz
32 kHz
Freq
CAPACITOR SELECTION FOR
THE TIMER1 OSCILLATOR
REGISTERS ASSOCIATED WITH TIMER1 AS A TIMER/COUNTER
Holding register for the Least Significant Byte of the 16-bit TMR1 register
Holding register for the Most Significant Byte of the 16-bit TMR1 register
Bit 7
GIE
—
—
—
ADIE
Bit 6
PEIE
ADIF
—
33 pF
15 pF
15 pF
C1
T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu
Bit 5
T0IE
—
—
33 pF
15 pF
15 pF
20 PPM
20 PPM
20 PPM
C2
INTE
Bit 4
—
—
Preliminary
SSPIF
SSPIE
RBIE
Bit 3
5.3
The TMR1 Register pair (TMR1H:TMR1L) increments
from 0000h to FFFFh and rolls over to 0000h. The
TMR1 Interrupt, if enabled, is generated on overflow
and is latched in interrupt flag bit TMR1IF (PIR1<0>).
This interrupt can be enabled by setting TMR1 interrupt
enable bit TMR1IE (PIE1<0>).
5.4
If the CCP module is configured in compare mode to
generate a “special event trigger" (CCP1M3:CCP1M0
= 1011), this signal will reset Timer1 and start an A/D
conversion (if the A/D module is enabled).
Timer1 must be configured for either timer or synchro-
nized counter mode to take advantage of this feature. If
Timer1 is running in asynchronous counter mode, this
reset operation may not work.
In the event that a write to Timer1 coincides with a spe-
cial event trigger from CCP1, the write will take prece-
dence.
In this mode of operation, the CCPR1H:CCPR1L regis-
ters pair effectively becomes the period register for
Timer1.
Note:
CCP1IF
CCP1IE
Bit 2
T0IF
Timer1 Interrupt
Resetting Timer1 using a CCP Trigger
Output
The special event trigger from the CCP1
module will not set interrupt flag bit
TMR1IF (PIR1<0>).
PIC16C62B/72A
TMR2IF
TMR2IE
INTF
Bit 1
TMR1IF
TMR1IE
Bit 0
RBIF
0000 000x 0000 000u
-0-- 0000 -0-- 0000
-0-- 0000 -0-- 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
Value on
POR,
BOR
DS35008B-page 29
Value on
all other
resets