ATTINY13A-SS7 Atmel, ATTINY13A-SS7 Datasheet - Page 57

• Manufacturer Part Number: ATTINY13A-SS7
• Description: IC MCU AVR 1K FLASH 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13A-SS7

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ATtiny
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: SPI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 1
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 105 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

10.4
10.4.1
10.4.2
10.4.3
8126E–AVR–07/10
Register Description
MCUCR – MCU Control Register
PORTB – Port B Data Register
DDRB – Port B Data Direction Register
Table 10-5.
• Bits 7, 2 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13A and will always read as zero.
• Bit 6 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See
figuring the Pin” on page 50
Bit
0x18
Read/Write
Initial Value
Bit
0x17
Read/Write
Initial Value
Bit
0x35
Read/Write
Initial Value
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
PB2/SCK/ADC1/
T0/PCINT2
0
0
0
0
0
0
0
PCINT2 • PCIE + ADC1D
ADC1D
T0/INT0/
PCINT2 Input
ADC1 Input
Overriding Signals for Alternate Functions in PB[2:0]
R
7
–
0
R
R
7
–
0
7
–
0
PUD
R/W
R
R
6
–
0
6
–
0
6
0
for more details about this feature.
PORTB5
DDB5
R/W
R/W
R/W
5
0
5
0
SE
5
0
PB1/MISO/AIN1/
OC0B/INT0/PCINT1
0
0
0
0
OC0B Enable
OC0B
0
PCINT1 • PCIE + AIN1D
AIN1D
PCINT1 Input
Analog Comparator
Negative Input
PORTB4
DDB4
R/W
R/W
4
0
4
0
SM1
R/W
4
0
PORTB3
DDB3
R/W
R/W
3
0
3
0
SM0
R/W
3
0
PORTB2
DDB2
R/W
R/W
2
0
2
0
R
2
–
0
PB0/MOSI/AIN0/
AREF/OC0A/PCINT0
0
0
0
0
OC0A Enable
OC0A
0
PCINT0 • PCIE + AIN0D
AIN0D
PCINT0 Input
Analog Comparator Positive
Input
PORTB1
DDB1
R/W
R/W
ISC01
R/W
1
0
1
0
1
0
PORTB0
DDB0
ISC00
R/W
R/W
R/W
0
0
0
0
0
0
MCUCR
PORTB
DDRB
“Con-
57