PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 524

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC32MX FAMILY
23.5.4
If the system clock source is derived from a crystal
oscillator and/or the PLL, then the Oscillator Start-up
Timer (OST) and/or PLL lock times will be applied
before the system clock source is made available to the
device. As an exception to this rule, no oscillator delays
are applied if the system clock source is the POSC
oscillator and it was running while in SLEEP mode.
EXAMPLE 23-1:
DS61143B-page 522
// Code example to put the Device in sleep and then Wake the device
// with the WDT
OSCCONSET = 0x10;
WDTCONCLR = 0x0002;
WDTCONSET = 0x8000;
while (1)
{
}
// The following code fragment is at the beginning of the ‘C’ start-up code
if ( RCON & 0x18 )
{
}
Note:
... user code ...
WDTCONSET = 0x01;
asm ( “wait” );
... user code ...
asm ( “eret” );
WAKE-UP FROM SLEEP MODE
WITH CRYSTAL OSCILLATOR OR
PLL
In spite of the various delays applied the
crystal oscillator (and PLL) may not be up
and running at the end of the T
T
user must design the external oscillator
circuit such that reliable oscillation will
occur within the delay period.
LOCK
delays. For proper operation the
PUT DEVICE IN SLEEP, THEN WAKE WITH WDT
// set Power-Saving mode to Sleep
// Disable WDT window mode
// Enable WDT
// WDT timeout period is set in the device configuration
// service the WDT
// put device in selected Power-Saving mode
// code execution will resume here after wake
// The WDT caused a wake from Sleep
// return from interrupt
Advance Information
OST
, or
23.5.5
The Fail-Safe Clock Monitor (FSCM) does not operate
while the device is in SLEEP. If the FSCM is enabled it
will resume operation when the device wakes from
Sleep.
23.5.6
When an oscillator starts slowly, the OST and PLL lock
times may not have expired before FSCM times out.
If the FSCM is enabled, then the device will detect this
condition as a clock failure and a clock event trap will
occur. The device will switch to the FRC oscillator and
the user can re-enable the crystal oscillator source in
the clock failure Interrupt Service Routine.
If the FSCM is not enabled, then the device will simply
not start executing code until the clock is stable. From
the user’s perspective, the device will appear to be in
SLEEP until the oscillator clock has started.
23.5.6.1
For devices with a USB peripheral, POSC and FRC
will remain active in Sleep if the USB module is not dis-
abled prior to entering Sleep. The Oscillators remain-
ing active will not stop the halting of the CPU or
peripherals in Sleep.
FAIL-SAFE CLOCK MONITOR
DELAY AND SLEEP MODE
SLOW OSCILLATOR START-UP
The USB peripheral control of
Oscillators in Sleep mode
© 2008 Microchip Technology Inc.