PIC32MX360F512L-80I/PT Microchip Technology, PIC32MX360F512L-80I/PT Datasheet - Page 455

• Manufacturer Part Number: PIC32MX360F512L-80I/PT
• Description: IC PIC MCU FLASH 512K 100-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX360F512L-80I/PT

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-TFQFP
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 85
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: I2C , SPI , UART
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 5 x 16 bit
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM320001, DM320002, MA320001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit
• Controller Family/series: PIC32
• No. Of I/o's: 85
• Ram Memory Size: 32KB
• Cpu Speed: 80MHz
• No. Of Timers: 6
• Embedded Interface Type: EUART, I2C, PSP, SPI
• No. Of Pwm Channels: 5
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1000 - PIC32 BREAKOUT BOARDAC244003 - TEST BD MPLAB REAL ICE LOOPBACKAC244006 - KIT MPLAB REAL ICE TRACEDM320001 - KIT EVAL PIC32 STARTERAC164333 - MODULE SKT FOR PM3 100QFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.3
The PMP Master mode timing for control, address and
data signals is dependent on the PBCLK peripheral bus
clock speed, address/data multiplexing and number of
Wait states, if any.
TABLE 20-7:
20.3.1
The Master mode configuration is determined primarily
by the interface requirements to the external device.
Address multiplexing, control signal polarity, data width
and Wait states typically dictate the specific configura-
tion of the PMP master port.
The following illustrates example settings for Master
Mode 2 operation:
• Select Master Mode 2 -
• Select 16-Bit Data mode -
• Select partial multiplexed addressing -
• Select auto-address increment -
• Enable Interrupt Request mode -
• Enable PMRD strobe -
• Enable PMWR strobe -
• Enable PMCS2 and PMCS1 chip selects -
• Select PMRD “active-low” pin polarity -
• Select PMWR “active-low” pin polarity -
• Select PMCS2, PMCS1 “active-low” pin polarity -
© 2008 Microchip Technology Inc.
Note 1:
MODE16 (PMMODE<10>) = 1.
ADRMUX<1:0> (PMCON<12:11>) = 01.
INCM<1:0> (PMMODE<12:11>) = 01.
IRQM<1:0> (PMMODE<14:13>) = 01.
Note:
MODE<1:0> (PMMODE<9:8>) = 10.
PTRDEN (PMCON<8>) = 1.
PTWREN (PMCON<9>) = 1.
CSF (PMCON<7:6>) = 10.
RDSP (PMCON<0>) = 0.
WRSP (PMCON<1>) = 0.
Full Multiplexed (16-bit data)
Full Multiplexed (8-bit data)
Multiplex Configuration
Master Mode Timing
Partial Multiplex
Address/Data
Demultiplexed
Table 20-7 provides a summary of maxi-
mum PMP peripheral clock rates. The
actual data throughput is highly depen-
dent on a user's application code content,
code structure, code optimization level
and other factors relating to the instruction
execution speed.
MASTER PORT CONFIGURATION
Peripheral bus clock operating at 1:1 with SYSCLK (80 MHz)
READ/WRITE SPEEDS, NO WAIT STATES
ADRMUX
Advance Information
00
01
10
11
Read
2
5
8
5
(PBCLK cycles)
PMP Operation
• Select 1 wait cycle for data setup -
• Select 2 wait cycles to extend PMRD/PMWR -
• Select 1 wait cycle for data hold -
• Enable upper 8 PMA<15:8> address pins -
(PMCON<3>) = 0.
WAITB<1:0>(PMMODE<7:6>) = 00.
WAITM<3:0>(PMMODE<5:2>) = 01.
WAITB<1:0>(PMMODE<1:0>) = 00.
PMAEN<15:8> = 1 (lower 8 can be used as
general purpose I/O).
CS2P (PMCON<4>) = 0 and CS1P
PIC32MX FAMILY
Write
3
6
9
6
Read
40.0
16.0
10.0
16.0
Speed
DS61143B-page 453
(1)
(MHz)
Write
26.6
13.3
13.3
8.8