PIC16F877-20/P Microchip Technology, PIC16F877-20/P Datasheet - Page 340

IC MCU FLASH 8KX14 EE 40DIP

PIC16F877-20/P

Manufacturer Part Number
PIC16F877-20/P
Description
IC MCU FLASH 8KX14 EE 40DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F877-20/P

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC16F
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
444-1001 - DEMO BOARD FOR PICMICRO MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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0
PICmicro MID-RANGE MCU FAMILY
DS31018A-page 18-4
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Register 18-2: RCSTA: Receive Status and Control Register
bit 7
SPEN: Serial Port Enable bit
1 = Serial port enabled (Configures RX/DT and TX/CK pins as serial port pins)
0 = Serial port disabled
RX9: 9-bit Receive Enable bit
1 = Selects 9-bit reception
0 = Selects 8-bit reception
SREN: Single Receive Enable bit
Asynchronous mode
Don’t care
Synchronous mode - master
1 = Enables single receive
0 = Disables single receive
Synchronous mode - slave
Unused in this mode
CREN: Continuous Receive Enable bit
Asynchronous mode
1 = Enables continuous receive
0 = Disables continuous receive
Synchronous mode
1 = Enables continuous receive until enable bit CREN is cleared (CREN overrides SREN)
0 = Disables continuous receive
Unimplemented: Read as '0'
FERR: Framing Error bit
1 = Framing error (Can be updated by reading RCREG register and receive next valid byte)
0 = No framing error
OERR: Overrun Error bit
1 = Overrun error (Can be cleared by clearing bit CREN)
0 = No overrun error
RX9D: 9th bit of received data, can be parity bit.
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
R/W-0
SPEN
This bit is cleared after reception is complete.
R/W-0
RX9
W = Writable bit
R/W-0
SREN
CREN
R/W-0
- n = Value at POR reset
U-0
FERR
R-0
1997 Microchip Technology Inc.
OERR
R-0
bit 0
RX9D
R-0

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