PIC18C252-I/SO Microchip Technology, PIC18C252-I/SO Datasheet - Page 150

IC MCU OTP 16KX16 A/D 28SOIC

PIC18C252-I/SO

Manufacturer Part Number
PIC18C252-I/SO
Description
IC MCU OTP 16KX16 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C252-I/SO

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
24
Ram Memory Size
1536Byte
Cpu Speed
40MHz
No. Of Timers
4
Interface
I2C, SPI, USART
Package
28SOIC W
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
I2C/SPI/USART
On-chip Adc
5-chx10-bit
Number Of Timers
4
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18C
Core
PIC
Data Ram Size
1536 B
Maximum Clock Frequency
40 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILI3DB18C452 - BOARD DAUGHTER ICEPIC3309-1073 - ADAPTER 28-SOIC TO 28-SOIC309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18C252-I/SO
Manufacturer:
Microchip Technology
Quantity:
1 840
Part Number:
PIC18C252-I/SO
Manufacturer:
Microchip
Quantity:
400
PIC18CXX2
14.4.16.3
Bus collision occurs during a STOP condition if:
a)
b)
FIGURE 14-29:
FIGURE 14-30:
DS39026C-page 148
After the SDA pin has been de-asserted and
allowed to float high, SDA is sampled low after
the BRG has timed out.
After the SCL pin is de-asserted, SCL is sam-
pled low before SDA goes high.
SDA
SCL
PEN
BCLIF
P
SSPIF
SSPIF
BCLIF
SDA
PEN
SCL
Bus Collision During a STOP
Condition
P
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
Assert SDA
T
SDA asserted low
BRG
T
BRG
T
BRG
T
BRG
The STOP condition begins with SDA asserted low.
When SDA is sampled low, the SCL pin is allowed to
float. When the pin is sampled high (clock arbitration),
the baud rate generator is loaded with SSPADD<6:0>
and counts down to 0. After the BRG times out, SDA is
sampled. If SDA is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ’0’ (Figure 14-29). If the SCL pin is sampled
low before SDA is allowed to float high, a bus collision
occurs. This is another case of another master attempt-
ing to drive a data ’0’ (Figure 14-30).
SCL goes low before SDA goes high
Set BCLIF
T
BRG
T
BRG
2001 Microchip Technology Inc.
’0’
’0’
SDA sampled
low after T
Set BCLIF
’0’
’0’
BRG
,

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