PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 86

• Manufacturer Part Number: PIC18F45J50-I/PT
• Description: IC PIC MCU FLASH 32K 2V 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F46J50 FAMILY
TABLE 5-4:
DS39931C-page 86
T3GCON
TRISE
TRISD
TRISC
TRISB
TRISA
ALRMCFG
ALRMRPT
ALRMVALH
ALRMVALL
LATE
LATD
LATC
LATB
LATA
DMACON1
DMATXBUF
DMACON2
HLVDCON
PORTE
PORTD
PORTC
PORTB
PORTA
SPBRGH1
BAUDCON1
SPBRGH2
BAUDCON2
TMR3H
TMR3L
T3CON
TMR4
PR4
T4CON
SSP2BUF
SSP2ADD/
SSP2MSK
SSP2STAT
SSP2CON1
Legend:
Note
File Name
1:
2:
3:
4:
5:
6:
(4)
x = unknown, u = unchanged, - = unimplemented, q = value depends on condition, r = reserved. Bold indicates shared access SFRs.
Bit 21 of the PC is only available in Serial Programming (SP) modes.
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
Alternate names and definitions for these bits when the MSSP module is operating in I
Masking Modes” for details.
These bits and/or registers are only available in 44-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 44-pin devices.
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the same physical registers and addresses, but have
different functions determined by the module’s operating mode. See Section 10.1.2 “Data Registers” for more information.
Alarm Value Register Window High Byte, Based on ALRMPTR<1:0>
Alarm Value Register Window Low Byte, Based on ALRMPTR<1:0>
SPI DMA Transmit Buffer
EUSART1 Baud Rate Generator Register High Byte
EUSART2 Baud Rate Generator Register High Byte
Timer3 Register High Byte
Timer3 Register Low Byte
Timer4 Register
Timer4 Period Register
MSSP2 Receive Buffer/Transmit Register
MSSP2 Address Register (I
VDIRMAG
TMR3CS1
DLYCYC3
TMR3GE
ALRMEN
SSCON1
ABDOVF
ABDOVF
TRISD7
TRISC7
TRISB7
TRISA7
ARPT7
LATD7
LATC7
LATB7
LATA7
WCOL
RDPU
MSK7
Bit 7
SMP
RD7
RC7
RB7
RA7
—
—
—
REGISTER FILE SUMMARY (PIC18F46J50 FAMILY) (CONTINUED)
T4OUTPS3 T4OUTPS2 T4OUTPS1
TMR3CS0
DLYCYC2
SSCON0
T3GPOL
TRISD6
TRISC6
TRISB6
TRISA6
BGVST
SSPOV
CHIME
ARPT6
LATD6
LATC6
RCIDL
RCIDL
LATB6
LATA6
REPU
MSK6
Bit 6
RD6
RC6
CKE
RB6
RA6
—
—
2
DLYCYC1
T3CKPS1
AMASK3
C™ Slave mode), MSSP2 Baud Rate Reload Register (I
TRISD5
TRISC5
T3GTM
TRISB5
TRISA5
RXDTP
RXDTP
SSPEN
ARPT5
LATD5
LATC5
LATB5
LATA5
TXINC
IRVST
MSK5
Bit 5
RD5
RC5
RB5
RA5
D/A
—
—
—
DLYCYC0
T3CKPS0
T3GSPM
AMASK2
HLVDEN
TRISD4
TRISC4
TRISB4
ARPT4
TXCKP
TXCKP
LATD4
LATC4
RXINC
LATB4
MSK4
Bit 4
RD4
RC4
CKP
RB4
—
—
—
—
—
—
P
T4OUTPS0
T3OSCEN
DUPLEX1
T3DONE
AMASK1
T3GGO/
INTLVL3
TRISD3
HLVDL3
TRISB3
TRISA3
SSPM3
ARPT3
BRG16
BRG16
LATD3
LATB3
LATA3
MSK3
Bit 3
RD3
RB3
RA3
—
—
—
—
—
—
S
DUPLEX0
TMR4ON
AMASK0
T3SYNC
T3GVAL
INTLVL2
TRISD2
TRISC2
HLVDL2
TRISE2
TRISB2
TRISA2
SSPM2
ARPT2
LATD2
LATC2
LATE2
LATB2
LATA2
MSK2
Bit 2
RD2
RC2
RE2
RB2
RA2
R/W
—
—
2
C™ Slave mode. See Section 18.5.3.2 “Address
ALRMPTR1 ALRMPTR0 0000 0000 66, 223
2
DLYINTEN
T4CKPS1
C Master mode)
T3GSS1
INTLVL1
HLVDL1
TRISE1
TRISD1
TRISC1
TRISB1
TRISA1
SSPM1
ARPT1
LATE1
LATD1
LATC1
LATB1
LATA1
MSK1
RD16
WUE
WUE
Bit 1
RE1
RD1
RC1
RB1
RA1
UA
© 2009 Microchip Technology Inc.
T4CKPS0 -000 0000 67, 217
TMR3ON
T3GSS0
INTLVL0
HLVDL0
TRISE0
TRISD0
TRISC0
TRISB0
TRISA0
DMAEN
ABDEN
ABDEN
SSPM0
ARPT0
LATE0
LATD0
LATC0
LATB0
LATA0
MSK0
Bit 0
RE0
RD0
RC0
RB0
RA0
BF
xxx- xxxx 66, 350
0000 0x00 66, 208
---- -111
1111 1111 66, 273
1111 -111 66, 136
1111 1111 66, 132
111- 1111 66, 129
0000 0000 66, 224
xxxx xxxx 66, 228
xxxx xxxx 66, 228
---- -xxx 66, 142
xxxx xxxx 66, 140
xxxx -xxx 66, 135
xxxx xxxx 66, 135
xxx- xxxx 66, 135
0000 0000 66, 276
xxxx xxxx
0000 0000 66, 277
0000 0000
00-- -xxx 66, 125
xxxx xxxx 66, 125
xxxx -xxx 66, 125
xxxx xxxx 66, 125
0000 0000 66, 321
0100 0-00 66, 321
0000 0000 66, 321
0100 0-00 66, 321
xxxx xxxx 67, 191
xxxx xxxx 67, 191
0000 0000 67, 191
0000 0000 67, 217
1111 1111 67, 191
xxxx xxxx 67, 282,
0000 0000 67, 282
0000 0000 67, 289
1111 1111 67, 264,
0000 0000 67, 264,
POR, BOR
Value on
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