PIC18F45J50-I/PT Microchip Technology, PIC18F45J50-I/PT Datasheet - Page 395

• Manufacturer Part Number: PIC18F45J50-I/PT
• Description: IC PIC MCU FLASH 32K 2V 44-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F45J50-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: EUSART, I2C, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Timers: 5
• Operating Supply Voltage: 2.25 V to 2.75 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180024, DM183022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Controller Family/series: PIC18
• No. Of I/o's: 22
• Ram Memory Size: 3776Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• Embedded Interface Type: EUSART, I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 24-3:
24.5
In many applications, it is desirable to have the ability to
detect a drop below, or rise above, a particular threshold.
For example, the HLVD module could be enabled
periodically to detect Universal Serial Bus (USB) attach
or detach.
For general battery applications, Figure 24-4 provides
a possible voltage curve.
Over time, the device voltage decreases. When the
device voltage reaches voltage, V
generates an interrupt at time, T
cause the execution of an ISR, which would allow the
application to perform “housekeeping tasks” and
perform a controlled shutdown before the device
voltage exits the valid operating range at T
The HLVD, thus, would give the application a time
window, represented by the difference between T
T
© 2009 Microchip Technology Inc.
B
, to safely exit.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
Applications
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
HIGH-VOLTAGE DETECT OPERATION (VDIRMAG =
HLVDIF may not be set
Internal Reference is stable
A
. The interrupt could
A
, the HLVD logic
B
.
A
Internal Reference is stable
and
T
T
IRVST
IRVST
PIC18F46J50 FAMILY
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
FIGURE 24-4:
V
V
A
B
Legend:
HLVDIF cleared in software
V
V
1
A
B
)
= HLVD trip point
= Minimum valid device
TYPICAL HIGH/
LOW-VOLTAGE DETECT
APPLICATION
operating voltage
Time
HLVDIF cleared in software
T
A
V
V
DS39931C-page 395
HLVD
HLVD
T
B