PIC12F635-I/MD Microchip Technology, PIC12F635-I/MD Datasheet - Page 83

• Manufacturer Part Number: PIC12F635-I/MD
• Description: IC PIC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/MD

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNAC162057 - MPLAB ICD 2 HEADER 14DIPXLT08DFN - SOCKET TRANSITION ICE 8DFN
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

7.9
This feature can be used to time the duration or inter-
val of analog events. Clearing the T1GSS bit of the
CMCON1 register will enable Timer1 to increment
based on the output of the comparator (or Comparator
C2 for PIC16F636/639). This requires that Timer1 is
on and gating is enabled. See Section 6.0 “Timer1
Module with Gate Control” for details.
It is recommended to synchronize the comparator with
Timer1 by setting the CxSYNC bit when the comparator
is used as the Timer1 gate source. This ensures Timer1
does not miss an increment if the comparator changes
during an increment.
7.10
The comparator (or Comparator C2 for PIC16F636/639)
output can be synchronized with Timer1 by setting the
CxSYNC bit of the CMCON1 register. When enabled,
the comparator output is latched on the falling edge of
the Timer1 clock source. If a prescaler is used with
Timer1, the comparator output is latched after the
prescaling function. To prevent a race condition, the
comparator output is latched on the falling edge of the
Timer1 clock source and Timer1 increments on the rising
edge of its clock source. See the Comparator Block
Diagram (Figure 7-2) and the Timer1 Block Diagram
(Figure 6-1) for more information.
© 2007 Microchip Technology Inc.
Note:
Note:
Comparator Gating Timer1
Synchronizing Comparator Output
to Timer1
References to the comparator in this
section
Comparator C2 on the PIC16F636/639.
References to the comparator in this
section
Comparator C2 on the PIC16F636/639.
specifically
specifically
are
are
referring
referring
PIC12F635/PIC16F636/639
to
to
DS41232D-page 81