PIC12F635-I/MD Microchip Technology, PIC12F635-I/MD Datasheet - Page 127

• Manufacturer Part Number: PIC12F635-I/MD
• Description: IC PIC MCU FLASH 1KX14 8DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F635-I/MD

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164326 - MODULA SKT PM3 20QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNAC162057 - MPLAB ICD 2 HEADER 14DIPXLT08DFN - SOCKET TRANSITION ICE 8DFN
• Data Converters: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

REGISTER 11-4:
REGISTER 11-5:
© 2007 Microchip Technology Inc.
bit 8
Legend:
R = Readable bit
-n = Value at POR
bit 8-7
bit 6-1
bit 0
bit 8
Legend:
R = Readable bit
-n = Value at POR
bit 8-5
bit 4-1
bit 0
Note 1:
LCXSEN3
R/W-0
U-0
—
Assured monotonic increment (or decrement) by design.
Unimplemented: Read as ‘0’
LCZTUN<5:0>: LCZ Tuning Capacitance bit
000000 = +0 pF (Default)
111111 = +63 pF
R3PAR: Register Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set
LCXSEN<3:0>
0000 = -0 dB (Default)
0001 = -2 dB
0010 = -4 dB
0011 = -6 dB
0100 = -8 dB
0101 = -10 dB
0110 = -12 dB
0111 = -14 dB
1000 = -16 dB
1001 = -18 dB
1010 = -20 dB
1011 = -22 dB
1100 = -24 dB
1101 = -26 dB
1110 = -28 dB
1111 = -30 dB
LCYSEN<3:0>
0000 = -0 dB (Default)
1111 = -30 dB
R4PAR: Register Parity Bit – set/cleared so the 9-bit register contains odd parity – an odd number of set
LCXSEN2
R/W-0
U-0
bits
bits
—
CONFIGURATION REGISTER 3
CONFIGURATION REGISTER 4
:
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
LCZTUN5
LCXSEN1
(1)
(1)
R/W-0
R/W-0
: Typical LCX Sensitivity Reduction bit
: Typical LCY Sensitivity Reduction bit
:
LCXSEN0
LCZTUN4
R/W-0
R/W-0
PIC12F635/PIC16F636/639
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
LCZTUN3
LCYSEN3
R/W-0
R/W-0
LCZTUN2
LCYSEN2
R/W-0
R/W-0
x = Bit is unknown
x = Bit is unknown
LCZTUN1
LCYSEN1
R/W-0
R/W-0
LCZTUN0
LCYSEN0
R/W-0
R/W-0
DS41232D-page 125
R3PAR
R4PAR
R/W-0
R/W-0
bit 0
bit 0