HIP4082EVAL Intersil, HIP4082EVAL Datasheet - Page 7

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HIP4082EVAL

Manufacturer Part Number
HIP4082EVAL
Description
EVAL BOARD FET DRIVER HIP4082
Manufacturer
Intersil
Type
FET Driverr
Datasheet

Specifications of HIP4082EVAL

Contents
Fully Assembled Evaluation Board
For Use With/related Products
HIP4082
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
The left and right half side half-bridges must be synchronized.
The left half-bridge switching is perfectly synchronized with
the minimum instances of the triangle wave and is therefore
fixed in phase with the triangle wave. The right half-bridge
slides with the level of the signal proportional to the DC bus
2
1
2
1
2
1
FIGURE 6. SECONDARY-SIDE CONTROL WAVEFORMS WITH
FIGURE 7. SECONDARY-SIDE FLIP-FLOP WAVEFORMS
CH1 = 5V
CH1 = 5V
CH1 = 5V
FIGURE 8. HIP2500 INPUT WAVEFORMS
LOWER DC BUS VOLTAGE
CH2 = 2V
CH2 = 5V
CH2 = 5V
M = 2.5µs
M = 2.5µs
M = 2.5µs
7
GLITCH CH2
GLITCH CH2
GLITCH CH2
Application Note 9611
C2 FREQ.
110.04Hz
C2 FREQ.
55.552Hz
C2 FREQ.
55.872Hz
voltage level as previously mentioned. When the triangle wave
reaches a minimum, a positive rising pulse is output at pin 3 of
the ICM7555 timer, U
flop which will either result in a high level at U
outputs, depending on the state of the data, D, input pin. It is
not important which goes high first, only that the toggling of
the Q and QNOT outputs of U
clock pulse from pin 3 of U
low each time that the triangle wave reaches a peak.
Of paramount importance, however, is the need to
synchronize the state of U
those of U
drive the upper left MOSFET in the left half-bridge (QNOT
obviously drives the lower MOSFET). It is necessary that
whenever the upper MOSFET of the left half-bridge is gated
that the lower MOSFET in the right half-bridge also will be
gated sometime within the same half-cycle. To guarantee that
this happens it is necessary to connect either the Q or QNOT
output of U
U
is chosen to drive the D input of U
the phase-shifted clock which goes to U
must gate the lower right MOSFET, which corresponds to the
LIN input of the right half-bridge driver, U
output signal of U
QNOT signal of U
The waveforms in Figure 4 show the phase voltage
waveforms of the left and right half-bridges and the resulting
output voltage waveform shown in Figure 3. Notice that the
algebraic difference between Trace 2 and Trace 1 waveforms
precisely result in a waveform like that of Figure 3.
Unlike the HIP4082 and other members of the HIP408X
family, the HIP2500 high voltage half-bridge driver requires
external circuitry to insure that the upper and lower
MOSFETs in a half-bridge leg do not conduct
simultaneously. The quad AND-gate, U
R
needs of any application. Each Q and QNOT output from the
flip-flops go directly to one input of a two input AND-gate and
also through an R-C delay to the 2nd input of the AND-gate.
Only after the R-C delay can the output of an AND-gate go
high. Conversely, when any of the Q or QNOT outputs go
low, a zero is placed on one of the AND-gate inputs and the
AND-gate’s output immediately goes low. Therefore an ON-
DELAY is produced, but no corresponding OFF-DELAY is
produced.
Overcurrent Protection
An instantaneous overcurrent function senses the voltage
drop across R
secondary-side inverter. The circuit comprising U
R
the current trip level. The values shown in the schematic
should cause overcurrent trip at approximately 1.3A. The
voltage on the negative summing junction of U
5A
27
29
, and capacitors C
, R
, which corresponds to the upper left MOSFET gate drive,
32
, R
5A
5A
36
. Arbitrarily the Q output of U
to the data, D, input of U
23
, shunt resistor R
for the purposes of shutting down the
5B
5B
must drive the LIN input of U
must drive the HIN input of U
8
. This rising edge ‘clocks’ the U
14
-C
5B
8
17
. The timer’s output, pin 3, goes
’s Q and QNOT outputs with
5A
tailor the dead-time to the
23
alternate at each positive
5B
and capacitor, C
, the next clock pulse from
5B
5B
6
9
. If the Q output of
, and resistors R
5A
. Therefore the Q
’s clock input pin
was chosen to
5A
7A
’s Q or QNOT
9
dictates the
9
7A
and the
.
32
, R
5A
dictate
28
flip-
24
,
-

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