SI5318-EVB Silicon Laboratories Inc, SI5318-EVB Datasheet - Page 19

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SI5318-EVB

Manufacturer Part Number
SI5318-EVB
Description
BOARD EVALUATION FOR SI5318
Manufacturer
Silicon Laboratories Inc
Type
Precision Clockr
Datasheets

Specifications of SI5318-EVB

Contents
Fully Assembled Evaluation Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SI5318
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1179
2.13. Design and Layout Guidelines
Precision clock circuits are susceptible to board noise
and EMI. To take precautions against unacceptable
levels of board noise and EMI affecting performance of
the Si5318, consider the following:
Power the device from 3.3 V since the internal
regulator provides at least 40 dB of isolation to the
V
Use an isolated local plane to connect the V
pins. Avoid running signal traces over or below this
plane without a ground plane in between.
Route all I/O traces between ground planes as much
as possible
Maintain an input clock amplitude in the 200 mV
500 mV
Excessive high-frequency harmonics of the input
clock should be minimized. The use of filters on the
input clock signal can be used to remove high-
frequency harmonics.
DD25
pins (which power the PLL circuitry).
PP
differential range.
DD25
PP
to
Rev. 1.0
Si5318
19

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