HS2556EPI61H Renesas Electronics America, HS2556EPI61H Datasheet - Page 199

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HS2556EPI61H

Manufacturer Part Number
HS2556EPI61H
Description
EMULATOR BASE H8SX/2556
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HS2556EPI61H

Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
7.2.3
The interface circuit between the MCU in the emulator and the user system has a signal delay of about 8 ns due
to the user system interface cable and it includes pull-up resistors. Therefore, high-impedance signals will be
pulled up to the high level. When connecting the emulator to a user system, adjust the user system hardware to
compensate for propagation delays.
Ports 5, A, B, C, D, E, F, G, H, and J:
Ports 1, 2, 3, and 7:
Mode Pins (MD2, MD1, and MD0): The mode pins are only monitored. The CPU mode depends on the High-
performance Embedded Workshop settings.
RESET and NMI: The RESET and NMI signals are input to the MCU through the emulator control circuit. The
rising/falling time of these signals must be 8 ns/V or less.
User System Interface Circuits (HS2556EPI62H)
Emulator
control
circuit
Figure 7.9 User System Interface Circuit for RESET and NMI Signals
Emulator
control
circuit
MCU
MCU
Figure 7.8 User System Interface Circuit for Mode Pins
Figure 7.6 User System Interface Circuit
Figure 7.7 User System Interface Circuit
47 k
47 k
47 k
74HC14
Ω
Ω
Ω
47 k
Ω
P1Vcc
P1Vcc
P2Vcc
47
47
47
Ω
Ω
Ω
Vcc
47
Ω
User system
interface cable
User system
interface cable
User system
interface cable
User system
interface cable
177

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