DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 15

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Freescale Semiconductor
1.2 56F803EVM Configuration Jumpers
Ten jumper groups, (JG1-JG10), shown in
features on the 56F803EVM board.
Jumper
Group
JG10
JG1
JG2
JG3
JG4
JG5
JG6
JG7
JG8
JG9
UNI-3 serial selected
Enable on-board Parallel JTAG Command Converter Interface
Use on-board crystal for oscillator input
Selects device’s Mode 0, BOOT From FLASH, operation upon exit from
reset
Enable external SRAM
UNI-3 3-Phase Current Source Selected
Encoder Input Selected
On-board Parallel JTAG Command Converter powered by Host System
Use on-board crystal for oscillator input
Leave CAN bus un-terminated
Table 1-1. 56F803EVM Default Jumper Options
Figure 1-2. 56F803EVM Jumper Reference
JG6
1
7
JG1
1 2
7
JG5
8 9
3
2
8
Table 1-1
P1
9
3
JG6
USER LED
Introduction, Rev. 5
1
7
8
2
2
8 9
Comment
3
PWM LEDs
LED3
7
1
3 2
7 8 9
JG4
JG7
1
JG5
JG7
P4
Figure
JG10
IRQA
1
S2
JG1
J3
J10
U15
IRQB
J2
JG4
JG10
1
S3
describes the default jumper group settings.
1
RUN/STOP
JG2
RESET
S/N
S1
S4
JG3
J8
Y1
U1
1-2, are used to configure various
P2
JG3
JG9
JG2
U6
JG8
J9
JG8
DSP56F803EVM
JG4
J4
1
1
JTAG
J1
U7
3
P3
JG9
56F803EVM Configuration Jumpers
1–2, 3–4, 5–6 & 7–8
2–3, 5–6 & 8–9
2–3, 5–6 & 8–9
Connections
Jumpers
1–2
1–2
1–2
1–2
NC
1-2
NC
1-3

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