COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 50
COP8SA-DM
Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of COP8SA-DM
Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
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the Program Counter (PC).
2.8.2
The program memory consists of 1024, 2048, or 4096 bytes of EPROM. Table 2-1 shows
the program memory sizes for the different devices. These bytes may hold program
instructions or constant data (data tables for the LAID instruction, jump vectors for the
JID instruction, and interrupt vectors for the VIS instruction). The program memory is
addressed by the 15-bit program counter (PC). All interrupts in the device vector to
program memory location 0FF Hex. The contents of the program memory read 00 Hex in
the erased state.
2.8.3
The data memory address space includes the on-chip RAM and data registers, the I/O
registers (Configuration, Data and Pin), the control registers, the MICROWIRE/PLUS
SIO shift register, and the various registers, and counters associated with the timers
(with the exception of the IDLE timer). Data memory is addressed directly by the
instruction or indirectly by the B, X and SP pointers.
The data memory consists of 64 or 128 bytes of RAM. Table 2-1 shows the data memory
sizes for the different devices. Fifteen bytes of RAM are mapped as “registers” at
addresses 0F0 to 0FE Hex. These registers can be loaded immediately, and also
decremented and tested with the DRSZ (decrement register and skip if zero) instruction.
The memory pointer registers X, SP and B are memory mapped into this space at address
locations 0FC to 0FE Hex respectively, with the other registers (except 0FF) being
available for general usage. Address location 0FF is reserved for future RAM expansion.
If compatibility with future devices (with more RAM) is not desired, this location can be
used as a general purpose RAM location.
The instruction set permits any bit in memory to be set, reset or tested. All I/O and
registers (except A and PC) are memory mapped; therefore, I/O bits and register bits can
be directly and individually set, reset and tested. The accumulator (A) bits can also be
directly and individually tested.
RAM contents are undefined upon power-up.
2-12
COP8SAx7 MICROCONTROLLER
Program Memory
Data Memory
COP8SAA7
COP8SAB7
COP8SAC7
Device
Table 2-1 Program/Data Memory Sizes
Program
Memory
(Bytes)
1024
2048
4096
64
128
128
Data Memory
(Bytes)
User Storage
8
8
8
(Bytes)
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