COP8SA-DM National Semiconductor, COP8SA-DM Datasheet - Page 175
COP8SA-DM
Manufacturer Part Number
COP8SA-DM
Description
MODULE DEBUGGING FOR COP8SA
Manufacturer
National Semiconductor
Datasheet
1.DM-COP820D.pdf
(254 pages)
Specifications of COP8SA-DM
Module/board Type
Debugger Module
For Use With/related Products
Cop 8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*COP8SA-DM
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but usually several at one time, thus adding the effective magnetic fields from all the
outputs which are switching.
Accurate analysis requires characterization of the noise present at the output due to V
or GND noise which is dependent on many factors, including internal peripherals in use,
execution code, and address of memory locations in use.
2.23.3 Board Layout
There are two primary techniques for reducing emissions from within the application.
This can be done either by reducing the noise or by controlling the antenna. Control of
the antenna is accomplished through careful PC board layout.
General
Standard good PC layout practices will go a long way toward reducing emissions. Traces
carrying large AC currents (such as signals with fast transition times, that drive large
loads) should be kept as short as possible. Traces that are sensitive to noise should be
surrounded by ground to the greatest extent possible. Ground and V
kept as short and wide as possible to reduce the supply impedance.
Ground Plane
One of the most effective ways to control emissions through board layout is with a ground
plane. The use of a plane can help by providing a return path for fast switching signals,
thus reducing loop size for both power and signals.
Harmoni
100
120
140
160
180
(MHz)
20
40
60
80
c
Curren
(mA)
37.56
26.13
16.82
11.21
3.66
4.44
4.71
4.86
7.82
t
|E|
( V/M)
104.0
127.4
44.2
80.2
8.3
0.3
0.6
2.0
5.8
Max
COP8SAx7 MICROCONTROLLER
|E|
(dB V/
-10.2
18.4
33.0
38.1
40.4
15.2
42.1
-4.4
M)
6.0
Max
CC
traces should be
2-137
CC
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