HSC-ADC-FPGA-8Z Analog Devices Inc, HSC-ADC-FPGA-8Z Datasheet - Page 20

• Manufacturer Part Number: HSC-ADC-FPGA-8Z
• Description: BOARD FPGA OCTAL LVDS FOR ADC
• Manufacturer: Analog Devices Inc

Specifications of HSC-ADC-FPGA-8Z

• Accessory Type: ADC Interface Board
• For Use With/related Products: Octal ADCs and HSC-ADC-EVAL DC FIFO Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
D1_16
D1_17
D1_10
D1_12
D1_13
D1_14
D1_15
D1_11
D1_8
D1_9
D1_0
D1_1
D1_2
D1_3
D1_4
D1_5
D1_6
D1_7
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
RZ601
RZ602
R603
R604
0Ω
0Ω
EXTERNAL MEMORY OVERRIDES ON BOARD MEMORIES WHEN PLUGGED IN. ONLY A SIDE DATA.
16
15
14
13
12
11
10
9
16
15
14
13
12
11
10
9
DC16
DC17
DC8
DC9
DC10
DC11
DC12
DC13
DC14
DC15
DC0
DC1
DC2
DC3
DC4
DC5
DC6
DC7
WRT_CLK1
CONNECTIONS FOR 2M WORD EXTERNAL MEMORY
EF1_BHB
FF1_BHB
DC10
DC13
DC17
DC11
DC0
DC3
DC2
DC6
DC8
DC7
DC4
DC5
DC9
QL0
QL3
QL4
QL7
Figure 11. Schematic (Continued)
J601
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
DNP
Rev. 0 | Page 20 of 28
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
DC14
DC15
DC16
DC1
DC12
REN1
RCLK
MRS
WEN1
QL1
QL2
QL5
QL6
RENEXT
QL0
QL1
QL2
QL3
QL4
QL5
QL6
QL7
J603: ALLOWS 2 MEG BUFFER TO READ BACK DATA
J602: ALLOWS 2 MEG BUFFER TO READ BACK 1 DATA
10
1
2
3
4
5
6
7
8
9
ON EACH RCLK EDGE.
ON EVERY 3RD RCLK EDGE. J602 IS FOR
BACKWARD COMPATABILITY IF NEEDED.
OUT_EN
D0
D1
D2
D3
D4
D5
D6
D7
GND
REN2M
74LCX574
U601
CLOCK
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
J602
DNP
20
19
18
17
16
15
14
13
12
11
VCC
1
2
3
4
5
6
7
8
VCC
J603
RZ605
C601
0.1µF
16
15
14
13
12
11
10
9
RCLK
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7