HSC-ADC-FPGA-8Z Analog Devices Inc, HSC-ADC-FPGA-8Z Datasheet - Page 2

• Manufacturer Part Number: HSC-ADC-FPGA-8Z
• Description: BOARD FPGA OCTAL LVDS FOR ADC
• Manufacturer: Analog Devices Inc

Specifications of HSC-ADC-FPGA-8Z

• Accessory Type: ADC Interface Board
• For Use With/related Products: Octal ADCs and HSC-ADC-EVAL DC FIFO Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

HSC-ADC-EVALB-SC/HSC-ADC-EVALB-DC
TABLE OF CONTENTS
Features .............................................................................................. 1
Equipment Needed........................................................................... 1
Product Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
FIFO Evaluation Board Easy Start.................................................. 3
Virtual Evaluation Board Easy Start With ADIsimADC ............ 4
FIFO 4.1 Data Capture Board Features ......................................... 5
Theory of Operation ........................................................................ 9
REVISION HISTORY
2/06—Revision 0: Initial Version
Requirements ................................................................................ 3
Easy Start Steps ............................................................................. 3
Requirements ................................................................................ 4
Easy Start Steps ............................................................................. 4
FIFO 4.1 Supported ADC Evaluation Boards .......................... 6
Clocking Description................................................................... 9
SPI Description............................................................................. 9
Rev. 0 | Page 2 of 28
Jumpers ............................................................................................ 11
Evaluation Board ............................................................................ 13
FIFO Schematics and PCB Layout ............................................... 14
Bill of Materials............................................................................... 23
Ordering Information.................................................................... 25
Clocking with Interleaved Data................................................ 10
Connecting to the HSC-ADC-FPGA-4/-8 ............................. 10
Connecting to the DEMUX BRD ............................................ 10
Upgrading FIFO Memory......................................................... 10
Default Settings........................................................................... 11
Power Supplies............................................................................ 13
Connection and Setup ............................................................... 13
Schematics................................................................................... 14
PCB Layout ................................................................................. 21
Ordering Guide .......................................................................... 25
ESD Caution................................................................................ 25