EVAL-AD7623CB Analog Devices Inc, EVAL-AD7623CB Datasheet - Page 6

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EVAL-AD7623CB

Manufacturer Part Number
EVAL-AD7623CB
Description
BOARD EVALUATION FOR AD7623
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheets

Specifications of EVAL-AD7623CB

Number Of Adc's
1
Number Of Bits
16
Sampling Rate (per Second)
1.33M
Data Interface
Serial, Parallel
Inputs Per Adc
1 Differential
Input Range
±VREF
Power (typ) @ Conditions
50mW @ 1.33MSPS
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD7623
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
AD7623
SERIAL CLOCK TIMING SPECIFICATIONS
Table 4. Serial Clock Timings in Master Read After Convert Mode
DIVSCLK[1]
DIVSCLK[0]
SYNC to SCLK First Edge Delay Minimum
Internal SCLK Period Minimum
Internal SCLK Period Maximum
Internal SCLK High Minimum
Internal SCLK Low Minimum
SDOUT Valid Setup Time Minimum
SDOUT Valid Hold Time Minimum
SCLK Last Edge to SYNC Delay Minimum
BUSY High Width Maximum
TO OUTPUT
NOTE
IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT ARE DEFINED WITH A MAXIMUM LOAD.
C
L
Figure 2. Load Circuit for Digital Interface Timing,
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
SDOUT, SYNC, and SCLK Outputs, C
PIN
50pF
C
L
500μA
500μA
I
I
OL
OH
1.4V
L
= 10 pF
Rev. 0 | Page 6 of 28
Symbol
t
t
t
t
t
t
t
t
t
18
19
19
20
21
22
23
24
28
t
DELAY
0.8V
0
0
0.5
8
12
2
3
1
0
0
0.780
Figure 3. Voltage Reference Levels for Timing
2V
0.8V
0
1
3
16
25
6
7
5
0.5
0.5
1.000
1
0
3
32
50
15
16
5
10
9
1.440
2V
t
DELAY
1
1
3
64
100
31
32
5
28
26
2.320
2V
0.8V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
μs

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