EVAL-AD7994CB Analog Devices Inc, EVAL-AD7994CB Datasheet - Page 7
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EVAL-AD7994CB
Manufacturer Part Number
EVAL-AD7994CB
Description
BOARD EVALUATION FOR AD7994
Manufacturer
Analog Devices Inc
Specifications of EVAL-AD7994CB
Number Of Adc's
1
Number Of Bits
12
Sampling Rate (per Second)
188k
Data Interface
Serial
Inputs Per Adc
4 Single Ended
Input Range
0 ~ 5.5 V
Power (typ) @ Conditions
7.7mW @ 188kSPS, 5.5 V
Voltage Supply Source
Single
Operating Temperature
-40°C ~ 125°C
Utilized Ic / Part
AD7994
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
I
Guaranteed by initial characterization. All values measured with input filtering enabled. C
tr and tf measured between 0.3 V
High speed mode timing specifications apply to the AD7993-1/AD7994-1 only. Standard and fast mode timing specifications apply to
both the AD7993-0/AD7994-0 and the AD7993-1/AD7994-1. See Figure 2.
Unless otherwise noted, V
Table 3.
Parameter
f
t
t
t
t
t
t
t
t
t
SCL
1
2
3
4
5
6
7
8
9
2
1
C TIMING SPECIFICATIONS
Conditions
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
Standard mode
Fast mode
High speed mode
Standard mode
Fast mode
High speed mode
C
C
C
C
C
C
C
C
C
C
B
B
B
B
B
B
B
B
B
B
= 100 pF max
= 400 pF max
= 100 pF max
= 400 pF max
= 100 pF max
= 400 pF max
= 100 pF max
= 400 pF max
= 100 pF max
= 400 pF max
DD
= 2.7 V to 5.5 V; REF
DD
and 0.7 V
DD
.
Min
4
0.6
60
120
4.7
1.3
160
320
250
100
10
0
0
0
0
4.7
0.6
160
4
0.6
160
4.7
1.3
4
0.6
160
20 + 0.1 C
10
20
IN
= 2.5 V; T
B
Limit at T
AD7993/AD7994
Rev. 0 | Page 7 of 32
Max
100
400
3.4
1.7
3.45
0.9
70
150
1000
300
80
160
A
=T
2
MIN
MIN
to T
, T
MAX
MAX
Unit
kHz
kHz
MHz
MHz
µs
µs
ns
ns
µs
µs
ns
ns
ns
ns
ns
µs
µs
ns
ns
µs
µs
ns
µs
µs
ns
µs
µs
µs
µs
ns
ns
ns
ns
ns
.
Description
Serial clock frequency
t
t
t
t
t
t
t
condition
t
t
B
HIGH
LOW
SU;DAT
HD;DAT
SU;STA
HD;STA
BUF
SU;STO
RDA
refers to capacitive load on the bus line.
, bus free time between a stop and a start
, rise time of SDA signal
, SCL low time
, SCL high time
, setup time for a repeated start condition
, setup time for stop condition
, data setup time
, hold time (repeated) start condition
, data hold time
AD7993/AD7994