EVAL-AD5440EB Analog Devices Inc, EVAL-AD5440EB Datasheet - Page 9

• Manufacturer Part Number: EVAL-AD5440EB
• Description: BOARD EVALUATION FOR AD5440
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5440EB

• Number Of Dac's: 2
• Number Of Bits: 10
• Outputs And Type: 2, Differential
• Sampling Rate (per Second): 21.3M
• Data Interface: Parallel
• Settling Time: 35ns
• Dac Type: Current
• Voltage Supply Source: Single
• Operating Temperature: -40°C ~ 125°C
• Utilized Ic / Part: AD5440
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Mnemonic
V
V
V
AV
DGND
CLR
LDAC
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
R/W
A1
A0
CS
V
AV
V
V
V
REFP
OUTB
OUTA
L
OUTD
OUTC
REFN
SS
DD
Description
Positive DAC Reference Input. The voltage applied to this pin defines the full-scale output voltage.
Allowable range is AV
Buffered Analog Output Voltage of DAC B.
Buffered Analog Output Voltage of DAC A.
Negative Analog Supply Pin. Voltage ranges from 0 V to −15 V.
Digital Ground Pin.
Active Low Input. Sets input registers and DAC registers to zero scale (0x000) for the AD5725-1 or midscale
(0x800) for the AD5725.
Active Low Load DAC Input.
Data Bit 0 (LSB).
Data Bit 1.
Data Bit 2.
Data Bit 3.
Data Bit 4.
Data Bit 5.
Data Bit 6.
Data Bit 7.
Data Bit 8.
Data Bit 9.
Data Bit 10.
Data Bit 11 (MSB).
Read/Write Pin. Active low to write data to DAC; Active high to read back previous data at data bit pins with
V
Address Bit 1.
Address Bit 0.
Active Low Chip Select Pin.
Voltage Supply for Readback Function. Can be left open circuit if not used.
Positive Analog Supply Pin. Voltage ranges from +5 V to +15 V.
Buffered Analog Output Voltage of DAC D.
Buffered Analog Output Voltage of DAC C.
Negative DAC Reference Input. The voltage applied to this pin defines the zero-scale output voltage.
Allowable range is AV
L
connected to +5 V.
DB0 (LSB)
DD
SS
V
V
V
DGND
LDAC
AV
Figure 6. Pin Configuration Diagram
OUTB
OUTA
REFP
to V
CLR
DB1
DB2
DB3
DB4
DB5
DB6
− 2.5 V to V
SS
REFP
10
11
12
13
14
1
2
3
4
5
6
7
8
9
Rev. A | Page 9 of 20
− 2.5 V.
(Not to Scale)
AD5725
TOP VIEW
REFN
+ 2.5 V.
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
V
V
AV
V
CS
A0
A1
R/W
DB11 (MSB)
DB10
DB9
DB8
DB7
REFN
OUTC
OUTD
L
DD
AD5725