EVAL-AD5532EB Analog Devices Inc, EVAL-AD5532EB Datasheet - Page 12

• Manufacturer Part Number: EVAL-AD5532EB
• Description: BOARD EVAL FOR AD5532
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5532EB

• Rohs Status: RoHS non-compliant
• Number Of Dac's: 32
• Number Of Bits: 14
• Outputs And Type: 32, Single Ended
• Sampling Rate (per Second): 45k
• Data Interface: Serial
• Settling Time: 22µs
• Dac Type: Voltage
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5532
• Lead Free Status / Rohs Status: Not Compliant

AD5532B
of the pin driver, the comparator output switches. The µC/µP
then knows what code is required to be input in order to obtain
the desired voltage at the DUT. The TRACK input is now
brought high and the part begins to acquire V
BUSY goes low until V
is then switched from V
MODES OF OPERATION
The AD5532B can be used in four different modes of oper-
ation. These modes are set by two mode bits, the first two bits in
the serial word.
CONTROLLER
IN
MSB
MSB
IN
has been acquired. The output buffer
to the output of the DAC.
1
1
MODE BITS
MODE BITS
MSB
DAC
0
MSB
TRACK
c. Input Serial Interface (Acquire and Readback Mode)
MODE BITS
MODE BIT 1 MODE BIT 2
BUSY
0
1
V
Figure 9. Typical ATE Circuit Using TRACK Input
IN
0
a. 10-Bit Input Serial Write Word (ISHA Mode)
b. 24-Bit Input Serial Write Word (DAC Mode)
MODE BITS
ONLY ONE CHANNEL SHOWN FOR SIMPLICITY
WRITTEN TO PART
d. Input Serial Interface (Readback Mode)
WRITTEN TO PART
SERIAL WORD
SERIAL WORD
1
CAL
CAL
IN
Figure 10. Serial Interface Formats
10-BIT
10-BIT
. At this stage,
ACQUISITION
0
CIRCUIT
CAL
OFFSET SEL
OFFSET SEL
CAL
OFFSET SEL
–12–
TEST BIT
TEST BIT
OFFSET SEL
Mode Bit 1
0
0
1
1
1. ISHA Mode
0
0
In this mode, a channel is addressed and that channel
acquires the voltage on V
write (see Figure 3) to address the relevant channel (V
V
AD5532B
OUT
TEST BIT
OUTPUT
STAGE
A4 –A0
A4 –A0
31, offset channel or all channels). MSB is written first.
0
TEST BIT
LSB
LSB
A4 –A0
0
Table II. Modes of Operation
NEXT FALLING EDGE OF SYNC
NEXT FALLING EDGE OF SYNC
V
(DB13 = MSB OF DAC WORD)
(DB13 = MSB OF DAC WORD)
OUT
READ FROM PART AFTER
READ FROM PART AFTER
A4 –A0
MSB
MSB
Mode Bit 2
0
1
0
1
1
DB13–DB0
DRIVER
DB1 3 –DB0
THRESHOLD
DB1 3 –DB0
14-BIT DATA
LSB
14-BIT DATA
PIN
VOLTAGE
IN
LSB
. This mode requires a 10-bit
LSB
LSB
Operating Mode
ISHA Mode
DAC Mode
Acquire and Readback
Readback
DEVICE
UNDER
TEST
REV. A
OUT
0–