MA300012 Microchip Technology, MA300012 Datasheet - Page 33
![MODULE DSPIC30F SAMPLE 64QFP](/photos/26/93/269359/ma300012_sml.jpg)
MA300012
Manufacturer Part Number
MA300012
Description
MODULE DSPIC30F SAMPLE 64QFP
Manufacturer
Microchip Technology
Specifications of MA300012
Module/board Type
dsPIC30F Plug-in Module
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
DM240001
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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FIGURE 9-4:
9.8
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface for communicating with
other peripheral or microcontroller devices such as
Serial EEPROMs, shift registers, display drivers, A/D
converters, etc. It is compatible with Motorola’s SPI™
and SIOP interfaces.
This SPI module includes all SPI modes. A Frame
Synchronization mode is also included for support of
voice band codecs.
Four pins make up the serial interface: SDI, serial data
input; SDO, serial data output; SCK, shift clock input or
output; SS, active low slave select, which also serves
© 2005 Microchip Technology Inc.
SPI
TM
Module
Frame Length Selection bits
Transmit Buffer
Registers w/Shadow
Receive Buffer
Registers w/Shadow
Word Size Selection bits
DCI Mode Selection bits
DCI MODULE BLOCK DIAGRAM
F
OSC
/4
BCG Control Bits
Synchronization
Sample Rate
Generator
Generator
Frame
15
as the FSYNC, frame synchronization pulse. A device
set up as an SPI Master provides the serial
communication clock signal on its SCK pin.
A series of 8 or 16 clock pulses (depending on mode)
shift out the 8 or 16 bits (depending on whether a byte
or word is being transferred) and simultaneously shift
in 8 or 16 bits of data from the SDI pin. An interrupt is
generated when the transfer is complete.
Transmits and receives are double-buffered, which
allows the buffer to be used while the shift register is
still shifting data in or out. Slave Select synchronization
allows selective enabling of SPI Slave devices, which
is particularly useful when a single Master is connected
to multiple slaves.
DCI Shift Register
Control Unit
DCI Buffer
CSCKD
COFSD
0
dsPIC30F
DS70043F-page 31
CSCK
COFS
CSDI
CSDO
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