89C5121-SK1 Atmel, 89C5121-SK1 Datasheet - Page 89

• Manufacturer Part Number: 89C5121-SK1
• Description: KIT SMART CARD FOR AT89C5121
• Manufacturer: Atmel
• Type: Smart Cardr

Specifications of 89C5121-SK1

• Contents: Board
• For Use With/related Products: AT89C5121
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C5121-SK1; T89C5121-SK1

Asynchronous Modes
(Modes 1, 2 and 3)
Figure 43. Serial I/O Port Block Diagram (Modes 1, 2 and 3)
Mode 1
Figure 44. Data Frame Format (Mode 1)
Modes 2 and 3
Figure 45. Data Frame Format (Modes 2 and 3)
Transmission (Modes 1, 2
and 3)
Reception (Modes 1, 2 and 3)
4164G–SCR–07/06
Modes 2 and 3
CLOCK
CLOCK
CLOCK
IBRG
PER
T1
Mode 1
SCON.4
SM2
The Serial Port has one 8-bit and two 9-bit asynchronous modes of operation. Figure 43
shows the Serial Port block diagram in such asynchronous modes.
Mode 1 is a full-duplex, asynchronous mode. The data frame (see Figure 44) consists of
10 bits: one start, eight data bits and one stop bit. Serial data is transmitted on the TXD
pin and received on the RXD pin. When a data is received, the stop bit is read in the
RB8 bit in SCON register.
Modes 2 and 3 are full-duplex, asynchronous modes. The data frame (see Figure 45)
consists of 11 bits: one start bit, eight data bits (transmitted and received LSB first), one
programmable ninth data bit and one stop bit. Serial data is transmitted on the TXD pin
and received on the RXD pin. On receive, the ninth bit is read from RB8 bit in SCON
register. On transmit, the ninth data bit is written to TB8 bit in SCON register. Alterna-
tively, you can use the ninth bit as a command/data flag.
To initiate a transmission, write to SCON register, setting SM0 and SM1 bits according
to Table 64, and setting the ninth bit by writing to TB8 bit. Then, writing the byte to be
transmitted to SBUF register starts the transmission.
To prepare for a reception, write to SCON register, setting SM0 and SM1 bits according
to Table 64, and setting REN bit. The actual reception is then initiated by a detected
high-to-low transition on the RXD pin.
SCON.6
Start Bit
M3 M2 M1 M0
SM1
Mode Decoder
Mode & Clock
Start Bit
Controller
SCON.1
TI
D0
SCON.7
D0
SM0
SCON.0
D1
RI
D1
D2
D2
D3
D3
8-bit Data
9-bit Data
D4
D4
SCON.3
TB8
SBUF Tx SR
D5
SBUF Rx
D5
Rx SR
D6
D6
D7
D7
SCON.2
RB8
Stop Bit
D8
A/T8xC5121
Stop Bit
TXD
RXD
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