89C5121-SK1 Atmel, 89C5121-SK1 Datasheet - Page 25

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89C5121-SK1

Manufacturer Part Number
89C5121-SK1
Description
KIT SMART CARD FOR AT89C5121
Manufacturer
Atmel
Type
Smart Cardr
Datasheet

Specifications of 89C5121-SK1

Contents
Board
For Use With/related Products
AT89C5121
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C5121-SK1
T89C5121-SK1
4164G–SCR–07/06
Table 9. CKCON0 Register
CKCON0 - Clock Control Register (8Fh)
Reset Value = X0X0 X000b
Number
Bit
7
-
7
6
5
4
3
2
1
0
Mnemonic
WDX2
WDX2
T1X2
T0X2
SIX2
6
Bit
X2
-
-
-
Description
Reserved
Watchdog clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this
bit has no effect)
Cleared to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Reserved
Enhanced UART clock (Mode 0 and 2)
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this
bit has no effect)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Reserved
Timer 1 clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this
bit has no effect)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle
Timer 0 clock
(This control bit is validated when the CPU clock X2 is set; when X2 is low, this
bit has no effect)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle
CPU clock
Clear to select 12 clock periods per machine cycle (Standard mode) for CPU
and all the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2" bits.
5
-
SIX2
4
3
-
T1X2
2
A/T8xC5121
T0X2
1
X2
0
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