89C5121-SK1 Atmel, 89C5121-SK1 Datasheet - Page 87

• Manufacturer Part Number: 89C5121-SK1
• Description: KIT SMART CARD FOR AT89C5121
• Manufacturer: Atmel
• Type: Smart Cardr

Specifications of 89C5121-SK1

• Contents: Board
• For Use With/related Products: AT89C5121
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: T89C5121-SK1; T89C5121-SK1

Figure 37. Internal Baud Rate Generator Block Diagram
Synchronous Mode (Mode 0)
Figure 38. Serial I/O Port Block Diagram (Mode 0)
Transmission (Mode 0)
4164G–SCR–07/06
CLOCK
PER
6
SCON.6
SCON.1
M3 M2 M1 M0
SM1
Mode Decoder
TI
BDRCON.1
Controller
SPD
Mode
0
1
Mode 0 is a half-duplex, synchronous mode, which is commonly used to expand the I/0
capabilities of a device with shift registers. The transmit data (TXD) pin outputs a set of
eight clock pulses while the receive data (RXD) pin transmits or receives a byte of data.
The 8-bit data are transmitted and received least-significant bit (LSB) first. Shifts occur
at a fixed Baud Rate. Figure 38 shows the serial port block diagram in Mode 0.
To start a transmission mode 0, write to SCON register clearing bits SM0, SM1.
As shown in Figure 39, writing the byte to transmit to SBUF register starts the transmis-
sion. Hardware shifts the LSB (D0) onto the RXD pin during the first clock cycle
composed of a high level then low level signal on TXD. During the eighth clock cycle the
MSB (D7) is on the RXD pin. Then, hardware drives the RXD pin high and asserts TI to
indicate the end of the transmission.
Figure 39. Transmission Waveforms (Mode 0)
SCON.7
SCON.0
SM0
RI
Write to SBUF
BDRCON.4
BRR
RXD
TXD
TI
CLOCK
CLOCK
PER
BRG
(8 bits)
(8 bits)
BRG
BRL
D0
Overflow
SBUF Rx SR
SBUF Tx SR
Baud Rate
Controller
D1
D2
2
SMOD1
PCON.7
D3
0
1
D4
CLOCK
IBRG
D5
RXD
TXD
A/T8xC5121
D6
To Serial Port
D7
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