HS2633REPI61H-U Renesas Electronics America, HS2633REPI61H-U Datasheet - Page 81

• Manufacturer Part Number: HS2633REPI61H-U
• Description: EMULATOR BASE UNIT H8S/2633R FAM
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of HS2633REPI61H-U

• Contents: E6000 Emulator and CD-ROM
• For Use With/related Products: H8S/2633R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

A maximum of eight points can be used as a combination in a sequence. The program is activated or halted by an
occurrence of the previous event in each sequence.
Range Channels (Ch9 to Ch12):
The emulator has 4 range channels. The range channel can be defined as a combination of one or more of the
followings:
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5.7.4
In the event detection system, signals indicating the MCU’s bus states and the accessed areas can be specified as
the event detection condition.
These signals are output from the MCU on the emulator; the signals to be acquired will vary according to the
emulator in use.
The signals to indicate bus states and areas are used to set the [Bus/Area] condition of the event point. They can
also be acquired as the trace information.
The bus state signals are also used to set the condition not to acquire the trace ([Suppress] option) and in the
Access Count Of Specified Range Measurement mode for measuring the hardware performance ([Access Type]
option).
For the trace function, refer to section 5.8, Viewing the Trace Information. For the hardware performance
function, refer to section 5.9, Analyzing Performance.
The following tables show examples of signals to indicate the bus states and areas that can be acquired by the
emulator.
Table 5.1
Bus State
CPU Prefetch
CPU Data
Refresh
DMAC
DTC
Other
An address or an address range
Outside of an address range
A read, a write, or either
Data with a mask specification
Bus state
Area
The value of four external probe signals
The number of delay cycles after the event has occurred
Signals to Indicate Bus States and Areas
Bus State Signals Acquired by the Emulator
Trace Display (Status)
PROG
DATA
REFRESH
DMAC
DTC
OTHER
Description
CPU prefetch cycles
CPU data access cycles
Refresh cycles
DMAC cycles
DTC cycles
Others
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