HW-V5-ML507-UNI-G Xilinx Inc, HW-V5-ML507-UNI-G Datasheet - Page 39

• Manufacturer Part Number: HW-V5-ML507-UNI-G
• Description: EVAL PLATFORM V5 FXT
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 FXTr
• Type: FPGAr

Specifications of HW-V5-ML507-UNI-G

• Contents: ML507 Platform, DVI adapter, CompactFlash Card and SATA Cross-Over Cable
• Silicon Manufacturer: Xilinx
• Features: JTAG Programming Interface, Platform Flash, External Clocking
• Kit Contents: Board
• Silicon Family Name: Virtex-5
• Silicon Core Number: XC5VFX70TFFG1136
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ML507
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
R
The JTAG debug port supports the four required JTAG signals: TCK, TMS, TDI, and TDO.
It also implements the optional TRST signal. The frequency of the JTAG clock signal can
range from 0 MHz (DC) to one-half of the processor clock frequency. The JTAG debug port
logic is reset at the same time the system is reset, using TRST. When TRST is asserted, the
JTAG TAP controller returns to the test-logic reset state.
Figure 1-7
Debug interfaces for high-speed, controlled-impedance signaling.
Note:
ML505 and ML506 boards.
Table 1-21
Table 1-21: CPU Trace/Debug Connection to FPGA
-
-
-
-
MICTOR_5
TRC_CLK
PC4_HALT_B
(CPU_HALT_N)
-
Pin Name
MICTOR_* pins are only available on the ML507 board. These pins are not connected on the
2.5V
shows a 38-pin Mictor connector that combines the CPU Trace and the CPU
shows the CPU trace/debug connections from P22 to the FPGA and BDM.
(1)
TRC_VSENSE
MICTOR_22
MICTOR_20
MICTOR_18
MICTOR_16
TRC_TS2O
TRC_TS1O
TRC_TS2E
TRC_TS1E
Figure 1-7: Combined Trace/Debug Connector Pinout
TRC_CLK
TRC_TS6
TRC_TS5
TRC_TS4
TRC_TS3
FPGA Pin (U1)
NC
NC
NC
NC
NC
www.xilinx.com
AD9
A24
W9
NC
NC
NC
NC
GND, G1, G2, G3, G4, G5
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
Mictor 38 (P22)
Mictor Pin (P22)
7
1
2
3
4
5
6
8
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
NC
NC
NC
NC
BDM Pin (J51)
Detailed Description
UG347_06_011008
MICTOR_37
MICTOR_35
MICTOR_33
MICTOR_31
MICTOR_29
MICTOR_27
MICTOR_25
MICTOR_23
CPU_TRST
FPGA_CS0_B
CPU_TMS
CPU_TCK
CPU_TDO
PC4_HALT_B
MICTOR_5
11
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