MPC8377E-RDBA Freescale Semiconductor, MPC8377E-RDBA Datasheet - Page 85

• Manufacturer Part Number: MPC8377E-RDBA
• Description: BOARD REF DES MPC8377 REV 2.1
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MPUr

Specifications of MPC8377E-RDBA

• Design Resources: MPC8379E-RDB Ref Design Guide
• Contents: Board, CD
• Frequency: 667 MHz
• For Use With/related Products: MPC8377E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

output driver features a 50-Ω termination resistor. It also assumes that the LVDS transmitter establishes its
own common mode level without relying on the receiver or other external component.
Figure 58
Since LVPECL driver’s DC levels (both common mode voltages and output swing) are incompatible with
device SerDes reference clock input’s DC requirement, AC-coupling has to be used.
that the LVPECL clock driver’s output impedance is 50 Ω. R1 is used to DC-bias the LVPECL outputs
prior to AC-coupling. Its value could be ranged from 140 Ω to 240 Ω depending on clock driver vendor’s
requirement. R2 is used together with the SerDes reference clock receiver’s 50 Ω termination resistor to
attenuate the LVPECL output’s differential peak level such that it meets the device SerDes reference
clock’s differential input amplitude requirement (between 200 mV and 800 mV differential peak). For
example, if the LVPECL output’s differential peak is 900 mV and the desired SerDes reference clock input
amplitude is selected as 600 mV, the attenuation factor is 0.67, which requires R2 = 25 Ω. Please consult
Freescale Semiconductor
LVDS CLK Driver Chip
Clock Driver
Clock Driver
Figure 57. AC-Coupled Differential Connection with LVDS Clock Driver (Reference Only)
shows the SerDes reference clock connection reference circuits for LVPECL type clock driver.
CLK_Out
CLK_Out
MPC8377E PowerQUICC II Pro Processor Hardware Specifications, Rev. 4
10 nF
10 nF
100 Ω differential PWB trace
SDn_REF_CLK
SDn_REF_CLK
50 Ω
High-Speed Serial Interfaces (HSSI)
50
Ω
Figure 58
MPC8377E
SerDes Refer.
CLK Receiver
assumes
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