MPC8323E-RDB Freescale Semiconductor, MPC8323E-RDB Datasheet - Page 15

• Manufacturer Part Number: MPC8323E-RDB
• Description: BOARD REFERENCE DESIGN
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II™ PROr
• Type: MCUr

Specifications of MPC8323E-RDB

• Contents: Reference Design Board, Software and Documentation
• Tool / Board Applications: Wired Connectivity-LIN, CAN, Ethernet, USB
• Mcu Supported Families: POWERQUICC II PRO
• Supported Devices: MPC8323E
• Rohs Compliant: Yes
• For Use With/related Products: MPC8323E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.2
This section provides the AC electrical characteristics for the DDR1 and DDR2 SDRAM interface.
6.2.1
Table 16
Table 17
Table 18
Freescale Semiconductor
At recommended operating conditions with D n _GV
At recommended operating conditions with D n _GV
At recommended operating conditions with D n _GV
AC input low voltage
AC input high voltage
AC input low voltage
AC input high voltage
Controller skew for MDQS—MDQ/MDM
Notes:
1. t
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
is captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the following equation: t
absolute value of t
CISKEW
MPC8323E PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 4
provides the input AC timing specifications for the DDR2 SDRAM (Dn_GV
provides the input AC timing specifications for the DDR1 SDRAM (Dn_GV
provides the input AC timing specifications for the DDR1 and DDR2 SDRAM interface.
DDR1 and DDR2 SDRAM AC Electrical Characteristics
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
DDR1 and DDR2 SDRAM Input AC Timing Specifications
Parameter
Parameter
Table 16. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
Table 17. DDR1 SDRAM Input AC Timing Specifications for 2.5 V Interface
Parameter
CISKEW
Table 18. DDR1 and DDR2 SDRAM Input AC Timing Specifications
.
266 MHz
200 MHz
DISKEW
Symbol
DD
DD
DD
Symbol
V
V
of 1.8 ± 5%.
of 2.5 ± 5%.
of (1.8 or 2.5 V) ± 5%.
IH
IL
V
V
=
IH
IL
±
(T/4 – abs(t
Symbol
t
CISKEW
MVREF n
MVREF n
CISKEW
Min
—
REF
Min
—
REF
)) where T is the clock period and abs(t
+ 0.31
+ 0.25
–1250
–750
Min
MVREF n
MVREF n
Max
—
REF
Max
—
REF
1250
Max
750
– 0.31
– 0.25
DISKEW
DDR1 and DDR2 SDRAM
DD
DD
. This can be
Unit
(typ) = 1.8 V).
(typ) = 2.5 V).
Unit
Unit
V
V
ps
V
V
CISKEW
) is the
Notes
Notes
Notes
1, 2
—
—
—
—
15