C8051F206DK Silicon Laboratories Inc, C8051F206DK Datasheet - Page 111

• Manufacturer Part Number: C8051F206DK
• Description: DEV KIT FOR C8051F206
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F206DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F206
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F206
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1237

15.1. Signal Descriptions
The four signals used by the SPI (MOSI, MISO, SCK, NSS) are described below.
15.1.1. Master Out, Slave In
The master-out, slave-in (MOSI) signal is an output from a master device and an input to slave devices. It
is used to serially transfer data from the master to the slave. Data is transferred most-significant bit first.
15.1.2. Master In, Slave Out
The master-in, slave-out (MISO) signal is an output from a slave device and an input to the master device.
It is used to serially transfer data from the slave to the master. Data is transferred most-significant bit first.
A SPI slave places the MISO pin in a high-impedance state when the slave is not selected.
15.1.3. Serial Clock
The serial clock (SCK) signal is an output from the master device and an input to slave devices. It is used
to synchronize the transfer of data between the master and slave on the MOSI and MISO lines.
15.1.4. Slave Select
The slave select (NSS) signal is an input used to select the SPI module when in slave mode by a master,
or to disable the SPI module when in master mode. When in slave mode, it is pulled low to initiate a data
transfer and remains low for the duration of the transfer.
Master
Device
Device
Slave
Figure 15.2. SPI Block Diagram
NSS
Device
Slave
Rev. 1.6
NSS
Device
Slave
NSS
VDD
C8051F2xx
MISO
MOSI
SCK
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