C8051F410-TB Silicon Laboratories Inc, C8051F410-TB Datasheet - Page 229
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C8051F410-TB
Manufacturer Part Number
C8051F410-TB
Description
BOARD PROTOTYPING W/C8051F410
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F410-TB
Contents
Board
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F410
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Table 23.1. SPI Slave Timing Parameters
Master Mode Timing* (See Figure 23.6 and Figure 23.7)
T
T
T
T
Slave Mode Timing* (See Figure 23.8 and Figure 23.9)
T
T
T
T
T
T
T
T
T
*Note: T
MCKH
MCKL
MIS
MIH
SE
SD
SEZ
SDZ
CKH
CKL
SIS
SIH
SOH
Parameter
SYSCLK
is equal to one period of the device system clock (SYSCLK) in ns.
SCK High Time
SCK Low Time
MISO Valid to SCK Sample Edge
SCK Sample Edge to MISO Change
NSS Falling to First SCK Edge
Last SCK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High-Z
SCK High Time
SCK Low Time
MOSI Valid to SCK Sample Edge
SCK Sample Edge to MOSI Change
SCK Shift Edge to MISO Change
Description
Rev. 1.1
1 x T
1 x T
2 x T
2 x T
5 x T
5 x T
2 x T
2 x T
C8051F410/1/2/3
Min
20
SYSCLK
SYSCLK
SYSCLK
SYSCLK
—
—
SYSCLK
SYSCLK
SYSCLK
SYSCLK
—
0
4 x T
4 x T
4 x T
Max
—
—
—
—
—
—
SYSCLK
SYSCLK
—
—
—
—
SYSCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
229
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