C8051F410-TB Silicon Laboratories Inc, C8051F410-TB Datasheet - Page 161

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C8051F410-TB

Manufacturer Part Number
C8051F410-TB
Description
BOARD PROTOTYPING W/C8051F410
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F410-TB

Contents
Board
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F410
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Bits7–0: P2.[7:0]
Bits7–0: Analog Input Configuration Bits for P2.7–P2.0 (respectively).
P2.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P2MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P2MDIN. Directly reads Port
pin when configured as digital input.
0: P2.n pin is logic low.
1: P2.n pin is logic high.
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P2.n pin is configured as an analog input. In order for the P2.n pin to be
in analog input mode, there MUST be a '1' in the Port Latch register corresponding to
that pin.
1: Corresponding P2.n pin is not configured as an analog input.
P2.6
R/W
R/W
Bit6
Bit6
SFR Definition 18.17. P2MDIN: Port2 Input Mode
P2.5
R/W
R/W
Bit5
Bit5
SFR Definition 18.16. P2: Port2
P2.4
R/W
R/W
Bit4
Bit4
Rev. 1.1
P2.3
R/W
R/W
Bit3
Bit3
P2.2
R/W
R/W
Bit2
Bit2
C8051F410/1/2/3
P2.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
P2.0
R/W
R/W
Bit0
Bit0
0xA0
0xF3
Addressable
Reset Value
Reset Value
11111111
11111111
Bit
161

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