Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 6

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

PRS001003-1207
Table 4. Flash Bypass Mode Register Structure
If Flash test mode is entered through the OCD test mode register, the ERASE, PROG,
MAS1, and NVSTR signals are subject to the state of ERASE_EN and PROG_EN Zilog
option bits at Flash Information Area address FE05H. The IFREN signal is subject to the
IWP[0] Zilog option bit at Flash Information Area address FE05H.
Driving the TESTMODE pad Low overrides all Zilog option bit settings.
Input/Output Input
Port A7
Port A6
Port A5
Port A4
Port A3
Port A2
Port A1
Port A0
000
ADDR[15] ADDR[7] DIN[7]
ADDR14] ADDR[6] DIN[6]
ADDR[13] ADDR[5] DIN[5]
ADDR[12] ADDR[4] DIN[4]
ADDR[11] ADDR[3] DIN[3]
ADDR[10] ADDR[2] DIN[2]
ADDR[9]
ADDR[8]
001
Input
ADDR[1] DIN[1]
ADDR[0] DIN[0]
Register Select [Port B1, Port B0, Port C0]
010
Input
011
AE
IFREN
CE
ERASE
PROG
MAS
NVSTR
Input
OE
100
Input
TMR
MUXENB DOUT[6] NOP
NOP
NOP
NOP
NOP
NOP
NOP
Z8 Encore!
101
DOUT[7] NOP
DOUT[5] NOP
DOUT[4] NOP
DOUT[3] NOP
DOUT[2] NOP
DOUT[1] NOP
Output
DOUT[0] NOP
®
F083x Series
Page 6 of 25
110-111
Input