45300 Parallax Inc, 45300 Datasheet - Page 68
![BOARD PROTO SX48](/photos/9/25/92507/mfg_45300_sml.jpg)
45300
Manufacturer Part Number
45300
Description
BOARD PROTO SX48
Manufacturer
Parallax Inc
Type
MCUr
Specifications of 45300
Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
SX48
For Use With
130-28029 - KIT PARTS SMART SENSORS45111 - MANUAL FOR SX-KEY/BLITZ VER. 2.028850 - CARRIER BOARD BOARD OF EDU USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
453001
Manufacturer:
LITTELFUSE/力特
Quantity:
20 000
Company:
Part Number:
453002
Manufacturer:
LITTELFU
Quantity:
1 000
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7 The SASM Assembler
When this macro is used in a program to be run on an SX48/52, it is necessary that the symbol SX48_52
is defined prior to the first invocation of the _bank macro.
7.4.13 Macros with Formal Parameters by Name
This is an example for a macro with one named parameter:
When invoked with
the word “cycles” is replaced by 7 and the macro expands into
The macro operates by generating as many JMP $+1 instructions as possible to use the bulk of the delay
at a cost of one instruction word per three clock cycles then make up the balance with NOP instructions.
For example, delay 6 would not generate NOP instructions at all but just two jmp $+1 instructions,
where delay 8 would generate two jmp $+1 and two NOP instructions. In case of cycles = 0, no code is
generated at all.
7.5
Symbols are descriptive names for numeric values. Symbol names can consist of up to 32 alphanumeric
and underscore (_) characters and must start with a letter or underscore. SASM expects symbol
declarations to start in column 1 of the program line. Symbols for constants are usually defined near the
start of assembly source code using the equal directive EQU. For example:
Page 68 SX-Key/Blitz Development System Manual 2.0 Parallax, Inc.
Symbols
delay MACRO cycles
ENDM
delay 7
IF (7 > 0)
ENDIF
REPT (7/3)
ENDR
REPT (7//3)
ENDR
IF (cycles > 0)
ENDIF
jmp $+1
jmp $+1
nop
REPT (cycles/3)
ENDR
REPT (cycles//3)
ENDR
jmp $+1
nop
; delay 3 cycles
; delay 1 cycle
; delay 3 cycles
; delay 3 cycles
; delay 1 cycle
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