DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 12

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Electrical Characteristics
Table 1–5. Recommended Operating Conditions for Stratix IV Devices
April 2011 Altera Corporation
V
and Stratix IV E)
V
(Stratix IV GT)
V
V
V
V
V
V
V
(Stratix IV GX
and Stratix IV E)
V
(Stratix IV GT)
V
V
V
V
T
and Stratix IV E)
T
t
Notes to
(1) If you do not use the volatile security key, you may connect the V
(2) V
RAMP
J
J
CC
CC
CCPT
CCAUX
CCPD
CCIO
CCPGM
CCA_PLL
CCD_PLL
CCD_PLL
CC_CLKIN
CCBAT
I
O
(Stratix IV GX
(Stratix IV GT)
(Stratix IV GX
Symbol
CCPD
(2)
(1)
Table
must be 2.5 V when V
1–5:
Core voltage and periphery circuitry power
supply
Core voltage and periphery circuitry power
supply
Power supply for programmable power
technology
Auxiliary supply for the programmable
power technology
I/O pre-driver (3.0 V) power supply
I/O pre-driver (2.5 V) power supply
I/O buffers (3.0 V) power supply
I/O buffers (2.5 V) power supply
I/O buffers (1.8 V) power supply
I/O buffers (1.5 V) power supply
I/O buffers (1.2 V) power supply
Configuration pins (3.0 V) power supply
Configuration pins (2.5 V) power supply
Configuration pins (1.8 V) power supply
PLL analog voltage regulator power supply
PLL digital voltage regulator power supply
PLL digital voltage regulator power supply
Differential clock input power supply
Battery back-up power supply (For design
security volatile key register)
DC input voltage
Output voltage
Operating junction temperature
Operating junction temperature
Power supply ramp time
CCIO
is 2.5, 1.8, 1.5, or 1.2 V. V
Description
CCPD
must be 3.0 V when V
CCBAT
to either GND or a 3.0-V power supply.
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
(PORSEL=0)
(PORSEL=1)
Normal POR
Commercial
Condition
Industrial
Industrial
Fast POR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CCIO
is 3.0 V.
Minimum
2.375
2.375
2.375
1.425
2.375
2.375
2.375
0.87
0.92
1.45
2.85
2.85
1.71
1.14
2.85
1.71
0.87
0.92
–0.5
0.05
0.05
–40
1.2
0
0
0
Typical
0.90
0.95
0.90
0.95
1.5
2.5
3.0
2.5
3.0
2.5
1.8
1.5
1.2
2.5
2.5
3.0
2.5
1.8
—
—
—
—
—
—
—
—
Maximum
2.625
2.625
2.625
1.575
2.625
2.625
2.625
V
0.93
0.98
1.55
3.15
3.15
1.89
1.26
0.93
0.98
3.15
1.89
100
100
100
3.3
3.6
85
CCIO
4
1–4
Unit
ms
ms
°C
°C
°C
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V