C8051T600DK Silicon Laboratories Inc, C8051T600DK Datasheet - Page 112
![KIT DEV FOR C8051T60X MCU'S](/photos/9/23/92339/c8051t600dk_sml.jpg)
C8051T600DK
Manufacturer Part Number
C8051T600DK
Description
KIT DEV FOR C8051T60X MCU'S
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051T600DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051T60x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051T600, C8051T601, C8051T602, C8051T603, C8051T604, C8051T605
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1404
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C8051T600/1/2/3/4/5/6
112
SYSCLK
Function
Figure 22.4. Priority Crossbar Decoder Example 1 - No Skipped Pins
Pin Skip
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
SDA
RX0
SCL
CP0
Port
TX0
ECI
Pin
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 x
XBR0
P0
In this example, the crossbar is configured to
assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note
that the SMBus signals are assigned as a pair,
and there are no pins skipped using the XBR0
register.
are used by the peripherals in this configuration.
1
2
3
respectively.
4
All unassigned pins can be used as GPIO or for
other non-crossbar functions.
Rev. 1.2
st
nd
rd
th
TX0 is assigned to P0.4
SYSCLK is assigned to P0.2
SDA and SCL are assigned to P0.0 and P0.1,
RX0 is assigned to P0.5
These boxes represent the port pins which
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