DEMO9S08JS16 Freescale Semiconductor, DEMO9S08JS16 Datasheet - Page 18

• Manufacturer Part Number: DEMO9S08JS16
• Description: BOARD DEMO FOR JS16 FAMILY
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08JS16

• Contents: 2 Boards, Cable, Documentation, DVD
• Processor To Be Evaluated: MC9S08JS16
• Data Bus Width: 8 bit
• Interface Type: USB
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08JS
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08JS16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
3.8
18
1
2
Num C
10
11
12
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
This specification applies any time the FLL reference source or reference divider is changed, trim value changed or changing
from FLL disabled (BLPE, BLPI) to FLL enabled (FEI, FEE, FBE, FBI). If a crystal/resonator is being used as the reference,
this specification assumes it is already running.
This specification applies to any time the PLL VCO divider or reference divider is changed, or changing from PLL disabled
(BLPE, BLPI) to PLL enabled (PBE, PEE). If a crystal/resonator is being used as the reference, this specification assumes it
is already running.
C Average internal reference frequency — untrimmed
C DCO output frequency range — untrimmed
C
C
C
C FLL acquisition time
D PLL acquisition time
C
D VCO operating frequency
D PLL reference frequency range
D Lock entry frequency tolerance
D Lock exit frequency tolerance
D Lock time — FLL
D Lock time — PLL
D
D
P Average internal reference frequency — trimmed
T Internal reference startup time
P DCO output frequency range — trimmed
P
T
T Jitter of PLL output clock measured over 625 ns
Resolution of trimmed DCO output frequency at
fixed voltage and temperature (using FTRIM)
Resolution of trimmed DCO output frequency at
fixed voltage and temperature (not using FTRIM)
Total deviation of trimmed DCO output frequency
over voltage and temperature
Total deviation of trimmed DCO output frequency
over fixed voltage and temperature range of
0–70
Long term Jitter of DCO output clock (averaged over
2ms interval)
Long term accuracy of PLL output clock (averaged
over 2 ms)
Loss of external clock minimum frequency —
RANGE = 0
Loss of external clock minimum frequency —
RANGE = 1
MCG Specifications
Table 9. MCG Frequency Specifications (Temperature Range = –40 to 85°C Ambient)
°C
3
1
2
Rating
MC9S08JS16 Series MCU Data Sheet, Rev. 4
7
6
5
f
pll_jitter_625ns
f
Δf
Δf
pll_jitter_2ms
t
t
Symbol
pll_acquire
fll_acquire
f
t
f
Δf
Δf
f
t
loc_high
dco_res_t
dco_res_t
C
f
pll_lock
loc_low
f
dco_ut
f
D
fll_lock
t
pll_ref
f
D
int_ut
dco_t
irefst
f
int_t
dco_t
dco_t
Jitter
vco
lock
unl
(16/5) x f
(3/5) x f
31.25
±1.49
±4.47
25.6
Min
7.0
1.0
25
32
—
—
—
—
—
—
—
—
—
—
—
—
int
int
Typical
0.590
0.566
33.48
32.7
±0.1
±0.2
–1.0
±0.5
0.02
—
60
—
0.5
—
—
—
—
—
—
—
—
—
—
4
4
Freescale Semiconductor
1075(1/
1075(1/
t
t
pll_acquire+
fll_acquire+
39.0625
41.66
42.66
±2.98
±5.97
Max
±0.2
±0.4
55.0
100
0.2
2.0
40
±2
±1
—
—
—
—
1
1
f
pll_ref)
f
int_t)
%f
%f
%f
%f
%f
MHz
MHz
Unit
MHz
MHz
kHz
kHz
kHz
kHz
ms
ms
μs
%
%
%
%
s
s
dco
dco
dco
dco
dco