C8051F020DK Silicon Laboratories Inc, C8051F020DK Datasheet - Page 252
![DEV KIT FOR F020/F021/F022/F023](/photos/9/23/92314/c8051f020dk_sml.jpg)
C8051F020DK
Manufacturer Part Number
C8051F020DK
Description
DEV KIT FOR F020/F021/F022/F023
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F020DK.pdf
(272 pages)
Specifications of C8051F020DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F02x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F020
Silicon Family Name
C8051F02x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F020/021/022/023
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1200
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F020DK
Manufacturer:
SiliconL
Quantity:
10
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C8051F020/1/2/3
23.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered Capture,
Software Timer, High Speed Output, Frequency Output, 8-Bit Pulse Width Modulator, or 16-Bit Pulse Width Modu-
lator. Each module has Special Function Registers (SFRs) associated with it in the CIP-51 system controller. These
registers are used to exchange data with a module and configure the module's mode of operation.
Table 23.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA0 capture/compare mod-
ule’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's CCFn interrupt. Note:
PCA0 interrupts must be globally enabled before individual CCFn interrupts are recognized. PCA0 interrupts are
globally enabled by setting the EA bit (IE.7) and the EPCA0 bit (EIE1.3) to logic 1. See Figure 23.3 for details on the
PCA interrupt configuration.
252
PWM16 ECOM CAPP CAPN
Timer Overflow
PCA Counter/
X
X
X
X
X
X
0
1
W
P
M
1
6
n
PCA Module 0
PCA Module 1
PCA Module 2
PCA Module 3
PCA Module 4
Table 23.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
(for n = 0 to 4)
PCA0CPMn
O
M
E
C
n
C
A
P
P
(CCF0)
(CCF1)
(CCF2)
(CCF3)
(CCF4)
n
C
N
A
P
n
X = Don’t Care
M
A
T
n
O
G
T
n
X
X
X
1
1
1
1
1
W
P
M
n
E
C
C
F
n
C
F
C
R
PCA0CN
1
0
1
0
0
0
0
0
C
C
F
4
C
C
F
3
C
C
F
2
C
C
F
1
Figure 23.3. PCA Interrupt Block Diagram
C
C
F
0
ECCF0
ECCF1
ECCF2
ECCF3
ECCF4
0
1
1
0
0
0
0
0
C
D
L
I
PCA0MD
C
P
S
2
MAT
C
P
S
1
X
X
X
0
1
0
1
0
1
0
1
0
1
0
0
0
1
1
C
P
S
0
C
E
F
0
1
TOG
0
0
0
0
1
1
0
0
Rev. 1.4
PWM ECCF Operation Mode
0
0
0
0
0
1
1
1
X
X
X
X
X
X
X
X
Capture triggered by negative edge on
Capture triggered by positive edge on
Capture triggered by transition on
16-Bit Pulse Width Modulator
8-Bit Pulse Width Modulator
(EIE1.3)
EPCA0
High Speed Output
Frequency Output
Software Timer
0
1
CEXn
CEXn
CEXn
(IE.7)
EA
0
1
Interrupt
Priority
Decoder
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