Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 18

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
10
ZNEO™ Series Development Board
ZNEO™ Series Development Kit
User Manual
Each of the internal memory spaces has a distinct purpose. Internal non-
volatile memory typically contains executable program code and constant
data. ZNEO-CPU-based devices have internal nonvolatile memory start-
ing at address
Flash has internal nonvolatile memory starting at address
ending at address
Internal RAM typically contains nonconstant data and the stack. Execut-
able program code can also reside in internal RAM, if desired. ZNEO-
CPU-based devices have internal RAM ending at address
while the beginning address (and hence the total extent of this space) is
device dependent. For example, a device equipped with 4K of RAM has
internal RAM starting at address
FF_BFFFH
the lowest possible starting address for internal RAM on any device is
FF_8000H
ZNEO-CPU-based devices support 8K of internal I/O memory located at
addresses
registers and other SFRs, onchip peripherals, and memory-mapped I/O
ports.
Finally, ZNEO-CPU-based devices also provide an external interface that
allows seamless connection to external memory and/or peripherals. Exter-
nal memory can be nonvolatile memory such as Flash, or RAM, or both.
External nonvolatile memory can be used to store program code and, at
the user’s option, constant data, while external RAM is available prima-
rily as a location for nonconstant data.
The external interface supports multiple chip select signals (CSx), which
are asserted by the CPU when an access to external memory is requested.
These signals can be used to access distinct ranges and devices in external
memory. The boundaries between memory ranges selected by the chip
select signals are at fixed addresses, and, in some cases, the ranges cov-
ered by chip selects might overlap. For example, there might be some
addresses in the range of both the CS0 and CS1 signals. In this case, the
FF_E000H-FF_FFFFH
. Because it is intended to be accessed using 16-bit addressing,
.
00_0000H
01_FFFFH
. For example, a device equipped with 128K of
.
FF_B000H
. This memory contains CPU control
and ending at address
00_0000H
UM020203-0606
FF_BFFFH
,
and

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