Z16F2800100ZCOG Zilog, Z16F2800100ZCOG Datasheet - Page 16

DEV KIT FOR Z16F ZNEO

Z16F2800100ZCOG

Manufacturer Part Number
Z16F2800100ZCOG
Description
DEV KIT FOR Z16F ZNEO
Manufacturer
Zilog
Series
ZNEO™r
Type
MCUr

Specifications of Z16F2800100ZCOG

Contents
Evaluation Board, Software and Documentation
For Use With/related Products
Z16F Series
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4537
8
ZNEO™ Series Development Board
ZNEO™ Series Development Kit
User Manual
Note:
ZNEO MEMORY LAYOUT
The external Flash memory on the ZNEO development kit board
has a 16-bit bus. All writes to Flash memory must be 16 bits at
even addresses only. Attempts to write 1 byte will result in the
byte being replicated on both the upper and lower bytes of the 16-
bit bus.
The ZNEO CPU has a unique memory architecture with a unified 24-bit
physical address space, which is partitioned into several distinct memory
areas. In terms of physical memory spaces, the overall address space can
include the following:
The internal spaces listed above are always present in ZNEO devices,
while the external space is optional. Every address space is defined as a
specific range of addresses located at a given place in the framework of
the unified 24-bit address space, and the address ranges of the different
spaces do not overlap. To promote code efficiency, the ZNEO CPU sup-
ports shorter 16-bit addressing for the memory located in the address
ranges 00_0000H-00_7FFFH and FF_8000H-FF_FFFFH. Figure 3 shows
the physical layout of memory spaces available in the ZNEO architecture.
Internal nonvolatile memory
Internal RAM
Internal I/O memory and special-function registers (SFRs)
External memory and memory mapped peripherals.
UM020203-0606

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