AT91SAM9M10-G45-EK Atmel, AT91SAM9M10-G45-EK Datasheet - Page 56

• Manufacturer Part Number: AT91SAM9M10-G45-EK
• Description: KIT EVAL FOR AT91SAMG45/9M10
• Manufacturer: Atmel
• Series: AT91SAM Smart ARMr
• Type: MCUr

Specifications of AT91SAM9M10-G45-EK

• Contents: Board, Cables, Power Supply
• Processor To Be Evaluated: AT91SAM9M10
• Processor Series: AT91SAM9
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB, JTAG
• Operating Supply Voltage: 5 V
• Silicon Manufacturer: Atmel
• Core Architecture: AVR
• Kit Contents: Board
• Features: Two High Speed USB Hosts, LCD TFT Display
• Svhc: No SVHC (15-Dec-2010)
• Mcu Supported Families: AT91SAM9M10,
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM9M10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

D
C
B
A
{4}
{4}
{7,10,12}
EBI0_D[0..15]
EBI0_A[0..13]
PA[0..31]
{5,6}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
{4}
8
8
EBI0_BA0
EBI0_BA1
EBI0_CKE
EBI0_CLK
EBI0_NCLK
EBI0_CS
EBI0_CAS
EBI0_RAS
EBI0_WE
DDR_VREF
EBI0_DQM0
EBI0_DQM1
EBI0_DQS0
EBI0_DQS1
EBI0_D0
EBI0_D1
EBI0_D2
EBI0_D3
EBI0_D4
EBI0_D5
EBI0_D6
EBI0_D7
EBI0_D8
EBI0_D9
EBI0_D10
EBI0_D11
EBI0_D12
EBI0_D13
EBI0_D14
EBI0_D15
EBI0_A0
EBI0_A1
EBI0_A2
EBI0_A3
EBI0_A4
EBI0_A5
EBI0_A6
EBI0_A7
EBI0_A8
EBI0_A9
EBI0_A10
EBI0_A11
EBI0_A12
EBI0_A13
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
M15
M16
M17
M18
G17
G16
G14
G18
G15
R16
R15
T14
P15
P16
P17
R14
P14
N15
N16
P18
N17
N18
N14
L14
L15
L16
L18
L17
K14
K15
K16
K18
K17
H18
H14
H17
H15
A16
H16
J14
J15
J16
J18
J17
M1
M2
M3
M4
M5
M6
L1
L5
N1
L6
L7
N2
P1
N3
P2
N4
N5
N6
R1
P3
R2
P4
T1
P5
R3
T2
T3
U1
U3
U2
R4
V1
PA0/MCI0_CK/TCLK3
PA1/MCI0_CDA/TIOA3
PA2/MCI0_DA0/TIOB3
PA3/MCI0_DA1/TCKL4
PA4/MCI0_DA2/TIOA4
PA5/MCI0_DA3/TIOB4
PA6/MCI0_DA4/ETX2
PA7/MCI0_DA5/ETX3
PA8/MCI0_DA6/ERX2
PA9/MCI0_DA7/ERX3
PA10/ETX0
PA11/ETX1
PA12/ERX0
PA13/ERX1
PA14/ETXEN
PA15/ERXDV
PA16/ERXER
PA17/ETXCK
PA18/EMDC
PA19/EMDIO
PA20/TW D0
PA21/TW CK0
PA22/MCI1_CDA/SCK3
PA23/MCI1_DA0/RTS3
PA24/MCI1_DA1/CTS3
PA25/MCI1_DA2/PW M3
PA26/MCI1_DA3/TIOB2
PA27/MCI1_DA4/ETXER
PA28/MCI1_DA5/ERXCK
PA29/MCI1_DA6/ECRS
PA30/MCI1_DA7/ECOL
PA31/MCI1_CK/PCK0
EBI0_DDR_D0
EBI0_DDR_D1
EBI0_DDR_D2
EBI0_DDR_D3
EBI0_DDR_D4
EBI0_DDR_D5
EBI0_DDR_D6
EBI0_DDR_D7
EBI0_DDR_D8
EBI0_DDR_D9
EBI0_DDR_D10
EBI0_DDR_D11
EBI0_DDR_D12
EBI0_DDR_D13
EBI0_DDR_D14
EBI0_DDR_D15
EBI0_DDR_A0
EBI0_DDR_A1
EBI0_DDR_A2
EBI0_DDR_A3
EBI0_DDR_A4
EBI0_DDR_A5
EBI0_DDR_A6
EBI0_DDR_A7
EBI0_DDR_A8
EBI0_DDR_A9
EBI0_DDR_A10
EBI0_DDR_A11
EBI0_DDR_A12
EBI0_DDR_A13
EBI0_DDR_BA0
EBI0_DDR_BA1
EBI0_DDR_CKE
EBI0_DDR_CLK
EBI0_DDR_NCLK
EBI0_DDR_CS
EBI0_DDR_CAS
EBI0_DDR_RAS
EBI0_DDR_W E
EBI0_DDR_VREF
EBI0_DDR_DQM0
EBI0_DDR_DQM1
EBI0_DDR_DQS0
EBI0_DDR_DQS1
MN5G
MN5G
MN5A
MN5A
7
7
EBI1_NBS3/NW R3/CFIOW
EBI1_NBS1/NW R1/CFIOR
PB17/SPI1_NPCS0/RTS0
PB18/RXD0/SPI0_NPCS1
PB19/TXD0/SPI0_NPCS2
EBI1_NW E/NW R0/CFW E
PB16/SPI1_SPCK/SCK0
PB15/SPI1_MOSI/CTS0
MN5F
MN5F
PB11/TW CK1/ISI_D11
EBI1_NBS2/NW R2/A1
PB10/TW D1/ISI_D10
PB31/ISI_MCK/PCK1
MN5B
MN5B
EBI1_NCS1/SDCS
PB3/SPI0_NPCS0
PB8/TXD3/ISI_D8
PB9/RXD3/ISI_D9
PB14/SPI1_MISO
PB29/ISI_VSYNC
PB30/ISI_HSYNC
EBI1_NRD/CFOE
PB2/SPI0_SPCK
PB0/SPI0_MISO
PB1/SPI0_MOSI
EBI1_NANDW E
EBI1_NBS0/A0
EBI1_NANDOE
EBI1_BA0/A16
EBI1_BA1/A17
EBI1_SDCKE
EBI1_NSDCK
EBI1_SDA10
PB20/ISI_D0
PB21/ISI_D1
PB22/ISI_D2
PB23/ISI_D3
PB24/ISI_D4
PB25/ISI_D5
PB26/ISI_D6
PB27/ISI_D7
PB28/ISI_D8
EBI1_SDW E
PB12/DRXD
PB13/DTXD
EBI1_DQM0
EBI1_DQM1
EBI1_DQS0
EBI1_DQS1
EBI1_SDCK
EBI1_NCS0
PB5/RXD1
PB7/RXD2
PB4/TXD1
PB6/TXD2
EBI1_RAS
EBI1_CAS
EBI1_D10
EBI1_D11
EBI1_D12
EBI1_D13
EBI1_D14
EBI1_D15
EBI1_A10
EBI1_A11
EBI1_A12
EBI1_A13
EBI1_A14
EBI1_A15
EBI1_A18
EBI1_D0
EBI1_D1
EBI1_D2
EBI1_D3
EBI1_D4
EBI1_D5
EBI1_D6
EBI1_D7
EBI1_D8
EBI1_D9
EBI1_A2
EBI1_A3
EBI1_A4
EBI1_A5
EBI1_A6
EBI1_A7
EBI1_A8
EBI1_A9
6
6
T4
V2
V3
U4
R5
V4
T5
U5
T12
N11
U13
M11
P6
R6
M7
V5
T6
U6
N7
P7
P12
T15
R12
T16
N12
M12
U14
M13
N13
R13
T13
P13
A17
D15
C15
B16
B15
D14
C14
A15
B14
D13
C13
E13
B13
E12
D12
C12
F13
F14
F18
F15
E14
F17
F16
E17
E15
E16
D18
D17
C18
B18
A18
B17
C10
B10
C17
B11
D11
A11
E11
A12
C11
F12
B9
B12
A13
A14
A10
F10
F11
C9
D9
A9
D10
E10
EBI1_D0
EBI1_D1
EBI1_D2
EBI1_D3
EBI1_D4
EBI1_D5
EBI1_D6
EBI1_D7
EBI1_D8
EBI1_D9
EBI1_D10
EBI1_D11
EBI1_D12
EBI1_D13
EBI1_D14
EBI1_D15
EBI1_A0
EBI1_A1
EBI1_A2
EBI1_A3
EBI1_A4
EBI1_A5
EBI1_A6
EBI1_A7
EBI1_A8
EBI1_A9
EBI1_A10
EBI1_A11
EBI1_A12
EBI1_A13
EBI1_A14
EBI1_A15
EBI1_A16
EBI1_A17
EBI1_A18
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
EBI1_DQM0 {4}
EBI1_DQM1 {4}
EBI1_DQS0 {4}
EBI1_DQS1 {4}
EBI1_RAS {4}
EBI1_CAS {4}
EBI1_SDWE {4}
EBI1_SDA10 {4}
EBI1_SDCKE
EBI1_SDCK {4}
EBI1_NSDCK
EBI1_NCS0 {6}
EBI1_NCS1/SDCS
EBI1_NRD/CFOE
EBI1_NWE/NWR0/CFWE
EBI1_NANDOE
EBI1_NANDWE
PB[0..31] {2,7,9,12}
{4,6}
EBI1_A0
{6}
{6}
PC[2..5]
EBI1_D[0..15]
EBI1_A[1..18]
{4}
{4}
PC8
PC14
{6}
{6}
{6}
{4}
TP5
TP5
TP pad
TP pad
{6}
5
5
{4}
{4}
PC8
PC14
{2,7,8,9,10,12}
SUP1
SUP1
SG-BGA-CA89405MF
SG-BGA-CA89405MF
PC2
PC3
PC4
PC5
DNP
DNP
{9}
{9}
{9}
{9}
{9}
{9}
A8
E9
B8
C8
F9
A7
D8
A6
E8
C7
B6
B7
A5
D7
F8
C6
E7
B5
D6
F7
A4
C5
B4
E6
D5
A3
C4
A1
A2
B2
B3
B1
{2}
NTRST
TDI
TMS
TCK
RTCK
TDO
{9}
{9}
{9}
{9}
NRST
PC0/DQM2
PC1/DQM3
PC2/A19
PC3/A20
PC4/A21/NANDALE
PC5/A22/NANDCLE
PC6/A23
PC7/A24
PC8/CFCE1
PC9/CFCE2/RTS2
PC10/NCS4/CFCS0/TCLK2
PC11/NCS5/CFCS1/CTS2
PC12/A25/CFRNW
PC13/NCS2
PC14/NCS3/NANDCS
PC15/NW AIT
PC16/D16
PC17/D17
PC18/D18
PC19/D19
PC20/D20
PC21/D21
PC22/D22
PC23/D23
PC24/D24
PC25/D25
PC26/D26
PC27/D27
PC28/D28
PC29/D29
PC30/D30
PC31/D31
VDDOSC
HDPA
HDMA
HDPB
HDMB
MN5C
MN5C
{2}
C46
C46
C50
C50
VDDBU
C53
C53
C57
C57
{2}
NTRST
WAKE UP
Opened
Closed
SHDN
2
22p
22p
22p
22p
15p
15p
15p
15p
BOOT MODE SELECT
TDI
TMS
TCK
RTCK
TDO
NRST
4
4
R30
R30
R31
R31
R33
R33
R32
R32
100n
100n
R34
R34
C44
C44
Y1
Y1
12MHz
12MHz
=
=
Y2
Y2
32.768KHz
32.768KHz
4
Internal ROM BOOT
NCS0
PD28/TSADTRG/SPI1_NPCS1
DNP
DNP
PD24/SPI0_NPCS1/PW M0
PD25/SPI0_NPCS2/PW M1
PD27/PCK1/SPI0_NPCS3
39R
39R
39R
39R
39R
39R
39R
39R
0R
0R
PD18/SPI1_NPCS2/IRQ
PD19/SPI0_NPCS3/FIQ
MN5D
MN5D
PD7/AC97TX/TIOA5
PD8/AC97FS/TIOB5
PD31/TIOB1/PW M1
PD26/PCK0/PW M2
PD29/TCLK1/SCK1
M10
PD30/TIOB0/SCK2
T18
R18
T17
R17
V15
V16
U15
U16
U11
U12
V12
V11
N10
R10
P10
U10
R11
V10
PD9/97CK/TCLK5
C1
D1
E4
F3
PD12/TK1/PCK0
PD0/TK0/PW M3
R39
R39
4.7k
4.7k
PD6/AC97RX
PD23/TCLK0
MN5H
MN5H
PD20/TIOA0
PD21/TIOA1
PD22/TIOA2
PD16/RTS1
PD17/CTS1
HFSDPA
HFSDMA
HHSDPA
HHSDMA
DFSDP/HFSDPB
DFSDM/HFSDMB
DHSDP/HHSDPB
DHSDM/HHSDMB
VDDOSC
GNDOSC
XIN
XOUT
XIN32
XOUT32
JTAGSEL
NTRST
TDI
TMS
TCK
RTCK
TDO
NRST
SHDN
PD11/RD1
PD13/RK1
3V3
PD10/TD1
PD14/TF1
PD15/RF1
PD2/TD0
PD3/RD0
PD4/RK0
PD5/RF0
PD1/TF0
JP8
JP8
SIP2
SIP2
R7
T7
L8
V6
M8
V7
N8
U7
P8
R8
U8
T8
V8
L9
U9
M9
N9
V9
R9
T9
D2
E1
F1
G2
F2
G1
H1
H2
P9
L10
T10
L11
C66
C66
10p
10p
R37
R37
6.8k
6.8k
3
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
3
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
R38
R38
10k
10k
PD[0..31]
{8,11,12}
{2,7,8,9,10,11,12}
PE[0..31]
AT91SAM9M10-G45-EK
AT91SAM9M10-G45-EK
AT91SAM9M10-G45-EK
VDDPLLUTMI
VDDUTMIC
TSADVREF
VDDCORE
VDDCORE
VDDCORE
VDDCORE
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
This agreement is our property. Reproduction and publication without our written authorization shall expose offender to legal proceedings.
VDDUTMII
AT91SAM9M10 chip
AT91SAM9M10 chip
AT91SAM9M10 chip
GNDUTMI
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM0
VDDIOM1
VDDIOM1
VDDIOM1
VDDIOM1
VDDPLLA
VDDIOP0
VDDIOP0
VDDIOP1
VDDIOP2
GNDANA
VDDANA
VDDBU
GNDBU
2
2
D4
D3
V13
U18
U17
V17
K9
K10
H3
V14
E18
G12
G13
H11
K13
L12
L13
M14
D16
F6
G10
G11
P11
E2
E3
C2
R36
R36
0R
0R
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
PE16
PE17
PE18
PE19
PE20
PE21
PE22
PE23
PE24
PE25
PE26
PE27
PE28
PE29
PE30
PE31
C64
C64
100n
100n
C40
C40
100n
100n
REV
REV
REV
SCALE
SCALE
SCALE
A2
A2
A2
A
A
A
C38 100n
C38 100n
C39 100n
C39 100n
C41 100n
C41 100n
C42 100n
C42 100n
C43 100n
C43 100n
C45 100n
C45 100n
C47 100n
C47 100n
C48 100n
C48 100n
C49 100n
C49 100n
C51 100n
C51 100n
C52 100n
C52 100n
C55 100n
C55 100n
C56 100n
C56 100n
C65
C65
100n
100n
C54 100n
C54 100n
C58 100n
C58 100n
G4
G5
G7
G3
G6
G8
C59 100n
C59 100n
C60 100n
C60 100n
C61 100n
C61 100n
C62 100n
C62 100n
C63 100n
C63 100n
F4
F5
H5
H6
H7
H8
H4
K1
K4
K2
K5
K6
K3
K7
K8
L3
L2
L4
J5
J3
J4
J2
J6
J7
J1
J8
MODIF.
MODIF.
MODIF.
R35
R35
0R
0R
1/1
1/1
1/1
PE0/LCDPW R/PCK0
PE1/LCDMOD
PE2/LCDCC
PE3/LCDVSYNC
PE4/LCDHSYNC
PE5/LCDDOTCK
PE6/LCDDEN
PE7/LCDD0/LCDD2
PE8/LCDD1/LCDD3
PE9/LCDD2/LCDD4
PE10/LCDD3/LCDD5
PE11/LCDD4/LCDD6
PE12/LCDD5/LCDD7
PE13/LCDD6/LCDD10
PE14/LCDD7/LCDD11
PE15/LCDD8/LCDD12
PE16/LCDD9/LCDD13
PE17/LCDD10/LCDD14
PE18/LCDD11/LCDD15
PE19/LCDD12/LCDD18
PE20/LCDD13/LCDD19
PE21/LCDD14/LCDD20
PE22/LCDD15/LCDD21
PE23/LCDD16/LCDD22
PE24/LCDD17/LCDD23
PE25/LCDD18
PE26/LCDD19
PE27/LCDD20
PE28/LCDD21
PE29/LCDD22
PE30/LCDD23
PE31/PW M2/PCK1
Derek
Derek
Derek
PP
PP
PP
DES.
DES.
DES.
MN5E
MN5E
08-apr-10
08-apr-10
08-apr-10
05-Feb-10
05-Feb-10
05-Feb-10
DATE
DATE
DATE
1
1
VDDBU {2}
VDDPLLUTMI {2}
VDDUTMIC
VDDUTMII
VDDIOP0 {2}
VDDIOP1 {2}
VDDIOP2 {2,12}
VDDCORE
VDDIOM0 {2}
VDDIOM1 {2}
VDDPLLA {2}
VDDANA {2}
VER.
VER.
VER.
A2
A2
A2
PP
PP
PP
REV.
REV.
REV.
11-FEB-10
11-FEB-10
11-FEB-10
SHEET
SHEET
SHEET
DATE
DATE
DATE
3
3
3
{2}
12
12
12
{2}
{2}
D
C
B
A