ATF15XX-DK3 Atmel, ATF15XX-DK3 Datasheet - Page 29
![KIT DEV FOR ATF15XX CPLD'S](/photos/9/21/92121/atf15xx-dk3_sml.jpg)
ATF15XX-DK3
Manufacturer Part Number
ATF15XX-DK3
Description
KIT DEV FOR ATF15XX CPLD'S
Manufacturer
Atmel
Series
Logic Doubling®r
Type
CPLDr
Specifications of ATF15XX-DK3
Contents
CPLD Programmer Board, 44-TQFP, Socket Adapter Board, Download Cable, CD-ROMs. Samples and User Guide
Processor To Be Evaluated
ATF15xx
Interface Type
JTAG
Operating Supply Voltage
1.8 V, 3.3 V, 5 V
For Use With/related Products
ATF15xx Family of CPLD
For Use With
ATF15XXDK3-SAJ84 - ADAPTER SKT ATF15XXBE 84/84PLCCATF15XXDK3-SAA100 - ADAPTER SKT ATF15XXB PLCC/TQFPATF15XXDK3-SAJ44 - ADAPTER SKT ATF15XXBE 84/44PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3605B–PLD–05/06
CPLD Design Flow Tutorial
3.4
3-8
Fit the
Synthesized
Design File
1. Click on the VHDL - Precision button in the Design Flow window to open the
2. In the Logic Synthesis window, check both options to Update Pin Assignments
3. Click on the Compile button to start the compile process. Close the log file when
Note:
In Section 3.3, the logic synthesis portion of the CPLD design flow was completed. On
successful compilation, the Precision tool will produce an EDIF output file (with .EDF
extension). An EDIF file contains the netlist of the optimized and minimized logic equa-
tions. We now need to map this netlist into a specific Atmel CPLD architecture using the
Atmel Fitter.
(2) Check
both options
here
Logic Synthesis window.
after each Compilation and also Run Precision in shell mode:
the synthesis is done successfully.
If you have encountered any syntax error during synthesis, the report file will
pop up to indicate which line of the code contains problem. In such case, you
must correct the syntax problem and save the file before synthesize the code
again before proceeding to the next step.
ATF15xx-DK3 Development Kit User Guide
(1) Open the Logic
Synthesis window