DK-N2EVAL-3C25N Altera, DK-N2EVAL-3C25N Datasheet - Page 18

• Manufacturer Part Number: DK-N2EVAL-3C25N
• Description: KIT DEV NIOS II CYCLONE III ED.
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-N2EVAL-3C25N

• Contents: Development Board, Module, and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III
• Rohs Compliant: Yes
• For Use With/related Products: EP3C25
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2411; DK-N2EVAL-3C25N-OB; DK-NIOSEVAL-3C25N; NEEK

DDR SDRAM/ SSRAM/On-Chip Controller
3–4
Cyclone III FPGA Starter Kit User Guide
The following sections describe how to access the DDR SDRAM. You can
use the same procedure to access the SSRAM.
Read/Write Data
To read from and write to the DDR SDRAM, follow these steps:
1.
Figure 3–3. Control Panel DDR SDRAM Tab
2.
Click the DDR SDRAM tab
indicates the hex address of the DDR SDRAM. The values inside the
0-3, 4-7, 8-B, and C-F columns are the DDR SDRAM contents in hex
words format.
To write a 32-bit word to the DDR SDRAM, click the desired
location, enter the desired value in hex format, and press Enter.
(Figure
3–3). The Address column
Altera Corporation
July 2010