DAC1405D750/DB,598 NXP Semiconductors, DAC1405D750/DB,598 Datasheet - Page 27

BOARD DEMO FOR DAC1405D750

DAC1405D750/DB,598

Manufacturer Part Number
DAC1405D750/DB,598
Description
BOARD DEMO FOR DAC1405D750
Manufacturer
NXP Semiconductors
Type
D/Ar

Specifications of DAC1405D750/DB,598

Number Of Dac's
2
Number Of Bits
14
Outputs And Type
2, Differential
Sampling Rate (per Second)
750M
Data Interface
Serial, SPI™
Settling Time
20ns
Dac Type
Current
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
DAC1405D750
Product
Data Conversion Development Tools
Conversion Rate
750 MSPS
Resolution
14 bit
Interface Type
SMA
Supply Voltage (max)
3.3 V
Supply Voltage (min)
1.8 V
For Use With/related Products
DAC1405D750
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5090
NXP Semiconductors
DAC1405D750
Product data sheet
10.7.1 NCO in 32-bit
10.7.2 Low-power NCO
10.7.3 Minus_3dB function
10.8 x / (sin x)
When using the NCO, the frequency can be set by the four registers FREQNCO_LSB,
FREQNCO_LISB, FREQNCO_UISB and FREQNCO_MSB over 32 bits.
The frequency for the NCO in 32-bit is calculated as follows:
where M is the decimal representation of FREQ_NCO[31:0].
The phase of the NCO can be set from 0 to 360 by both registers PHINCO_LSB and
PHINCO_MSB over 16 bits.
When using the low-power NCO, the frequency can be set by the 5 MSB of register
FREQNCO_MSB.
The frequency for the low-power NCO is calculated as follows:
where M is the decimal representation of FREQ_NCO[31:27].
The phase of the low-power NCO can be set by the 5 MSB of the register PHINCO_MSB.
During normal use, a full-scale pattern will also be full scale at the output of the DAC.
Nevertheless, when the I and Q data are simultaneously close to full scale, some clipping
can occur and the Minus_3dB function can be used to reduce the gain by 3 dB in the
modulator. This is to keep a full-scale range at the output of the DAC without added
interferers.
Due to the roll-off effect of the DAC, a selectable FIR filter is inserted to compensate for
the x / (sin x) effect. This filter introduces a DC loss of 3.4 dB. The coefficients are
represented in
Table 37.
First interpolation filter
Lower
H(1)
H(2)
H(3)
H(4)
H(5)
f
NCO
f
NCO
=
=
M
--------------
Inversion filter coefficients
M
--------------
2
32
2
5
f
Table 37 “Inversion filter
All information provided in this document is subject to legal disclaimers.
s
f
s
Rev. 3 — 7 September 2010
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
Upper
H(9)
H(8)
H(7)
H(6)
-
coefficients”.
DAC1405D750
Value
2
4
10
35
401
© NXP B.V. 2010. All rights reserved.
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