EVAL-AD5373EBZ Analog Devices Inc, EVAL-AD5373EBZ Datasheet - Page 4

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EVAL-AD5373EBZ

Manufacturer Part Number
EVAL-AD5373EBZ
Description
BOARD EVAL FOR AD5373
Manufacturer
Analog Devices Inc
Datasheets

Specifications of EVAL-AD5373EBZ

Number Of Dac's
32
Number Of Bits
14
Outputs And Type
32, Single Ended
Sampling Rate (per Second)
540k
Data Interface
Serial
Settling Time
20µs
Dac Type
Voltage
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
AD5373
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD5372/AD5373
SPECIFICATIONS
DV
C
unless otherwise noted.
Table 2.
Parameter
ACCURACY
REFERENCE INPUTS (VREF0, VREF1)
SIGGND INPUTS (SIGGND0 TO SIGGND3)
OUTPUT CHARACTERISTICS
DIGITAL INPUTS
DIGITAL OUTPUTS (SDO, BUSY)
L
SDO High Impedance Leakage Current
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Zero-Scale Error
Full-Scale Error
Gain Error
Zero-Scale Error
Full-Scale Error
Span Error of Offset DAC
VOUTx Temperature Coefficient
DC Crosstalk
VREFx Input Current
VREFx Range
DC Input Impedance
Input Range
SIGGNDx Gain
Output Voltage Range
Nominal Output Voltage Range
Short-Circuit Current
Load Current
Capacitive Load
DC Output Impedance
Input High Voltage
Input Low Voltage
Input Current
CLR High Impedance Leakage Current
Input Capacitance
Output Low Voltage
Output High Voltage (SDO)
High Impedance Output Capacitance
= open circuit; R
CC
= 2.5 V to 5.5 V; V
2
2
2
L
2
= open circuit; gain (M), offset (C), and DAC offset registers at default values; all specifications T
DD
2
= 9 V to 16.5 V; V
2
2
2
AD5372
B Version
16
±4
±1
±10
±10
0.1
1
1
±35
5
100
±10
2/5
50
±0.5
0.995/1.005
V
V
−4 to +8
15
±1
2200
0.5
1.7
2.0
0.8
±1
±20
10
0.5
DV
±5
10
SS
DD
SS
CC
+ 1.4
= −16.5 V to −8 V; VREF0 = VREF1 = 3 V; AGND = DGND = SIGGNDx = 0 V;
− 1.4
− 0.5
1
AD5373
B Version
±1
±1
1
1
±35
100
±10
2/5
±0.5
0.995/1.005
V
V
15
±1
2200
0.5
2.0
0.8
±1
±20
10
0.5
±5
10
14
±10
±10
0.1
5
50
−4 to +8
1.7
DV
SS
DD
Rev. B | Page 4 of 24
CC
+ 1.4
− 1.4
− 0.5
1
Unit
Bits
LSB max
LSB max
mV max
mV max
% FSR
LSB typ
LSB typ
mV max
ppm FSR/°C typ
μV max
μA max
V min/V max
kΩ min
V min/V max
min/max
V min
V max
V min/V max
mA max
mA max
pF max
Ω max
V min
V min
V max
μA max
μA max
pF max
V max
V min
μA max
pF typ
Test Conditions/Comments
Guaranteed monotonic by design over
temperature
Before calibration
Before calibration
Before calibration
After calibration
After calibration
See the Offset DACS section for details
Includes linearity, offset, and gain drift
Typically 20 μV; measured channel at midscale,
full-scale change on any other channel
Per input; typically ±30 nA
±2% for specified operation
Typically 55 kΩ
I
I
VOUTx to DV
JEDEC compliant
DV
DV
DV
Excluding CLR pin
Sinking 200 μA
Sourcing 200 μA
LOAD
LOAD
CC
CC
CC
= 1 mA
= 1 mA
= 2.5 V to 3.6 V
= 3.6 V to 5.5 V
= 2.5 V to 5.5 V
CC
, V
DD
, or V
SS
MIN
2
to T
MAX
,

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