EVAL-AD5373EBZ Analog Devices Inc, EVAL-AD5373EBZ Datasheet - Page 16

• Manufacturer Part Number: EVAL-AD5373EBZ
• Description: BOARD EVAL FOR AD5373
• Manufacturer: Analog Devices Inc

Specifications of EVAL-AD5373EBZ

• Number Of Dac's: 32
• Number Of Bits: 14
• Outputs And Type: 32, Single Ended
• Sampling Rate (per Second): 540k
• Data Interface: Serial
• Settling Time: 20µs
• Dac Type: Voltage
• Voltage Supply Source: Dual ±
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD5373
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD5372/AD5373
OUTPUT AMPLIFIER
Because the output amplifiers can swing to 1.4 V below the
positive supply and 1.4 V above the negative supply, this limits
how much the output can be offset for a given reference voltage.
For example, it is not possible to have a unipolar output range
of 20 V, because the maximum supply voltage is ±16.5 V.
Figure 20 shows details of a DAC output amplifier and its
connections to the offset DAC. On power-up, S1 is open,
disconnecting the amplifier from the output. S3 is closed, so
the output is pulled to SIGGNDx (R1 and R2 are greater than
R6). S2 is also closed to prevent the output amplifier from being
open-loop. If CLR is low at power-up, the output remains in this
condition until CLR is taken high. The DAC registers can be
programmed, and the outputs assume the programmed values
when CLR is taken high. Even if CLR is high at power-up, the
output remains in the previous condition until V
V
outputs then go to their power-on default value.
TRANSFER FUNCTION
The output voltage of a DAC in the AD5372/AD5373 is depend-
ent on the value in the input register, the value of the M and C
registers, and the value in the offset DAC.
AD5372 Transfer Function
The input code is the value in the X1A or X1B register that is
applied to the DAC (X1A, X1B default code = 21,844).
where:
M = code in gain register − default code = 2
C = code in offset register − default code = 2
The DAC output voltage is calculated as follows:
SS
SIGGNDx
< −4 V and the initialization sequence has finished. The
DAC_CODE = INPUT_CODE × (M + 1)/2
VOUT = 4 × VREFx × (DAC_CODE – (OFFSET_CODE ×
4))/2
OFFSET
16
DAC
+ V
60kΩ
R4
Figure 20. Output Amplifier and Offset DAC
SIGGND
CHANNEL
20kΩ
R3
DAC
60kΩ
20kΩ
R2
20kΩ
R5
R1
CLR
S2
CLR
S1
16
15
– 1.
.
SIGGNDx
16
DD
+ C − 2
R6
10kΩ
S3
> 6 V and
CLR
OUTPUT
15
Rev. B | Page 16 of 24
where:
DAC_CODE should be within the range of 0 to 65,535.
For 12 V span, VREFx = 3.0 V.
For 20 V span, VREFx = 5.0 V.
OFFSET_CODE is the code loaded to the offset DAC. It is
multiplied by 4 in the transfer function because this DAC is
a 14-bit device. On power-up, the default code loaded to the
offset DAC is 5461 (0x1555). With a 3 V reference, this gives
a span of −4 V to +8 V.
AD5373 Transfer Function
The input code is the value in the X1A or X1B register that is
applied to the DAC (X1A, X1B default code = 5461).
where:
M = code in gain register − default code = 2
C = code in offset register − default code = 2
The DAC output voltage is calculated as follows:
where:
DAC_CODE should be within the range of 0 to 16,383.
For 12 V span, VREFx = 3.0 V.
For 20 V span, VREFx = 5.0 V.
OFFSET_CODE is the code loaded to the offset DAC.
On power-up, the default code loaded to the offset DAC
is 5461 (0x1555). With a 3 V reference, this gives a span
of −4 V to +8 V.
REFERENCE SELECTION
The AD5372/AD5373 have two reference input pins. The
voltage applied to the reference pins determines the output
voltage span on VOUT0 to VOUT31. VREF0 determines the
voltage span for VOUT0 to VOUT7 (Group 0), and VREF1
determines the voltage span for VOUT8 to VOUT31 (Group 1
to Group 3). The reference voltage applied to each VREF pin
can be different, if required, allowing the groups to have
different voltage spans. The output voltage range and span
can be adjusted further by programming the offset and gain
registers for each channel as well as programming the offset
DACs. If the offset and gain features are not used (that is, the
M and C registers are left at their default values), the required
reference levels can be calculated as follows:
If the offset and gain features of the AD5372/AD5373 are used,
the required output range is slightly different. The selected
output range should take into account the system offset and
gain errors that need to be trimmed out. Therefore, the selected
output range should be larger than the actual required range.
DAC_CODE = INPUT_CODE × (M + 1)/2
VOUT = 4 × VREFx × (DAC_CODE –
OFFSET_CODE)/2
VREF = (VOUT
MAX
14
– VOUT
+ V
SIGGND
MIN
)/4
14
13
– 1.
.
14
+ C − 2
13