ADC08D1020DEV/NOPB National Semiconductor, ADC08D1020DEV/NOPB Datasheet - Page 7

• Manufacturer Part Number: ADC08D1020DEV/NOPB
• Description: BOARD DEV FOR ADC08D1020
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC08D1020DEV/NOPB

• Number Of Adc's: 2
• Number Of Bits: 8
• Sampling Rate (per Second): 1G
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: 870 mVpp
• Power (typ) @ Conditions: 1.6W @ 1GSPS
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: ADC08D1020
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC08D1020DEV

to
disconnecting the external clock. If a problem
does occur, simply reset the board. This may be
found on the pull-down menu: Settings, Capture
Settings.
check that the Evaluation Board is reporting the
correct clock frequency.
board clock, it is recommended to remove or turn
off any external clock source.
5.4 Digital Data Output
The two channel digital output data from the
ADC08(D)XXXX is connected to a Xilinx Virtex 4
FPGA. Up to 4K bytes of data per channel may
be stored and then uploaded over the USB
interface to the WaveVision software. The FPGA
logic requires a small amount of space, allowing
for further code to be written and tested for
product development.
5.5 Power Requirements
The
ADC08(D)XXXXDEV
typically 12V at 800 mA.
draws around 500 mA.
Most of the on-board regulators are switching
regulators for increased power efficiency.
A Universal 100-240V AC input to 12V DC Brick
Power Supply is included with the development
board.
5.6 Power Supply Connections
Power to this board is supplied through the power
connector on the rear panel. It is advised that
only the supplied PSU is used with this board.
The ADC08(D)XXXX supply voltage has been
set to 1.9V, ±50 mV using on-board regulators.
Obtaining the best results with any ADC requires
both good circuit techniques and a good PC
board layout. For layout information for this
product,
Semiconductor representative
6.1 Clock Jitter
When any circuitry is added after a signal source,
jitter is almost always added to that signal. Jitter
in a clock signal, depending upon the severity of
that jitter, will degrade dynamic performance.
The effects of jitter in the frequency domain
(FFT) may be observed as "leakage" or "spectral
spreading" around the input frequency, as seen
6.0 Obtaining Best Results
switch
power
please
Click on the Reset button.
to
supply
the
contact
on-board
Evaluation
requirement
When using the on-
The board typically
.
your
clock
Board
for
National
before
Then,
the
is
in Figure 4a. Compare this with the more
desirable plot of Figure 4b. Note that all dynamic
performance parameters (shown to the right of
the FFT) are improved by eliminating clock jitter.
NOTE: Before connecting this board to the PC,
install the Wavevision4 software from the
CDROM included with the development kit. (See
Appendix B.)
Connecting the Development Board before
installation may result in the board being
registered as an unknown USB device. If this
occurs, the device must first be uninstalled using
the Windows Device Manager before installing
the WaveVision4 Software.
7.0 Using the WaveVision4
software with the
ADC08(D)XXXXDEV
Figure 4a. Jitter causes spectral spreading
cleaner FFT, better dynamic performance
Figure 4b. Minimal clock jitter results in
and spurs
7