CDB53L21 Cirrus Logic Inc, CDB53L21 Datasheet - Page 52

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CDB53L21

Manufacturer Part Number
CDB53L21
Description
BOARD EVAL FOR CS53L21 ADC
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB53L21

Number Of Adc's
2
Number Of Bits
24
Sampling Rate (per Second)
96k
Data Interface
Serial
Inputs Per Adc
3 Single Ended
Input Range
±2.5 V
Power (typ) @ Conditions
22.45mW @ 48kSPS, 2.5 V
Voltage Supply Source
Analog and Digital
Operating Temperature
-10°C ~ 70°C
Utilized Ic / Part
CS53L21
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1550
52
6.13
6.14
ALC_ENB
Reserved
7
7
Function:
Implements mono mixes of the left and right channels as well as a left/right channel swap.
ALC Enable & Attack Rate (Address 1Ch)
ALC Enable (ALC_ENX)
Default: 0
0 - Disabled
1 - Enabled
Function:
Enables automatic level control for ADC channel x.
Note:
ALC Attack Rate (ARATE[5:0])
Default: 000000
Function:
Sets the rate at which the ALC attenuates the analog input from levels above the maximum setting in the
ALC threshold register.
The limiter attack rate is user-selectable but is also a function of the sampling frequency, Fs, and the SOFTx
& ZCROSSx bit settings unless the disable bit for each function is enabled.
ALC Release Rate (Address 1Dh)
ALC Release Rate (RRATE[5:0])
Default: 111111
ADCA[1:0]
Binary Code
Binary Code
000000
000000
01
10
11
111111
111111
ALC_ENA
When the ALC is enabled, the Attenuator and PGA volume is automatically controlled and should
not be adjusted manually.
Reserved
···
···
6
6
SDOUT
L
----------- -
ALC_RRATE5 ALC_RRATE4 ALC_RRATE3 ALC_RRATE2 ALC_RRATE1 ALC_RRATE0
ALC_ARATE5 ALC_ARATE4 ALC_ARATE3 ALC_ARATE2 ALC_ARATE1 ALC_ARATE0
+
2
R
R
5
5
Slowest Release
Fastest Release
Release Time
Slowest Attack
Attack Time
Fastest Attack
ADCB[1:0]
···
···
01
10
11
4
4
SDOUT
L
----------- -
+
2
L
R
3
3
2
2
1
1
CS53L21
DS700PP1
0
0

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