CDB5560 Cirrus Logic Inc, CDB5560 Datasheet - Page 18

DEV BOARD FOR CS5560 W/MUX

CDB5560

Manufacturer Part Number
CDB5560
Description
DEV BOARD FOR CS5560 W/MUX
Manufacturer
Cirrus Logic Inc
Type
A/Dr
Datasheets

Specifications of CDB5560

Number Of Adc's
1
Number Of Bits
24
Sampling Rate (per Second)
50k
Data Interface
Serial
Inputs Per Adc
1 Differential
Input Range
±3 V
Power (typ) @ Conditions
90mW @ 2.5 V
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
CS5560
Product
Data Conversion Development Tools
Conversion Rate
50 KSPS
Resolution
24 bit
Maximum Clock Frequency
16 MHz
Interface Type
SPI
Supply Voltage (max)
3.3 V
Supply Voltage (min)
- 2.5 V
For Use With/related Products
CS5560
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Other names
598-1273
CDB5560-1
The following figure depicts the CS5560 device powered from a single 5V analog supply.
18
47pF
47pF
4.99k
4.99k
49.9
49.9
Reference
(NOTE 1)
Voltage
+4.096
+5 V
Figure 7. CS5560 Configured Using a Single 5V Analog Supply
+0.452 V
+4.548 V
+0.452 V
4.548 V
2.5 V
2.5 V
2.048 V
4.096 V
10 µF
(V+) Buffers On
(V-) Buffers Off
4700pF
4700pF
C0G
C0G
0.1 µF
0.1 µF
NOTES
+5 V
1. See Section 3.3 Voltage Reference for information on
2. Locate capacitors so as to minimize loop length.
3. V1-, V2-, and VLR should be connected to the same
4. SCLK and SDO may require pull-down resistors in
5/4/09
BUFEN
VREF+
VREF-
AIN-
AIN+
required voltage reference performance criteria.
ground plane under the chip.
some applications.
0.1 µF
0.1 µF
10
X7R
V1+
V2+
V2-
DCR
V1-
CS5560
SMODE
VLR2
SLEEP
VLR
4
BP/UP
CONV
MCLK
+3.3 V to 1.8 V
SCLK
4
VL
SDO
RDY
RST
TST
CS
0.1 µF
50
CS5560
DS713PP2

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